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User software must clear any associated flags before interrupts are enabled. 3 — VDDA V P Analog input offset voltage VAIO — — 40 mV C Analog comparator hysteresis (HYST=0) VH — 15 20 mV C Analog comparator hysteresis (HYST=1) VH — 20 30 mV T Supply current (Off mode) IDDAOFF — 60 — nA C Propagation Delay tD — 0. 25 Integral Non-Linearity 12-bit mode T — ±1. 1 Determining valid orderable parts Valid orderable part numbers are provided on the web. 1 1 µA |IOZTOT| C Total leakage All input only and I/O VIN = VDD or combined for VSS all inputs and Hi-Z pins — — 2 µA RPU P Pullup resistors All digital inputs, when enabled — 30. 1 8 Pinout31 Control timing16 KE02 Sub-Family Data Sheet, Rev3, 07/2013. Reset timing tIHIL KBIPx IRQ/KBIPx tILIH Figure 10. To take PI/O into account in power calculations, determine the difference between actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. SPI master mode timing (CPHA=0) SS1 (OUTPUT) 2 SPSCK (CPOL = 0) (OUTPUT) SPSCK (CPOL = 1) (OUTPUT) 3 5 6 MISO (INPUT) 5 10 11 10 11 4 7 MSB IN2 8 MOSI 2 (OUTPUT)PORT DATA MASTER MSB OUT BIT 6 . 05 MHz D Erase Verify All Blocks tVFYALL — — 17338 tcyc D Erase Verify Flash Block tRD1BLK — — 16913 tcyc D Erase Verify EEPROM Block tRD1BLK — — 810 tcyc D Erase Verify Flash Section tRD1SEC — — 484 tcyc D Erase Verify EEPROM Section tDRD1SEC — — 555 tcyc D Read Once tRDONCE — — 450 tcyc D Program Flash (2 word) tPGM2 0. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. VOL(high drive strength) (VDD = 3 V) VOL(V) IOL(mA) Figure 8. ACMP adder causes IDD to increase typically by less than 1 µA. 1 DC characteristics This section includes information about power supply requirements and I/O pin characteristics. 5 × tcyc — — ns Port rise and fall time Normal drive strength (load = 50 pF) — tRise — 10. Peripheral operating requirements and behaviors Table 11. VDD-VOH (high drive strength) (VDD = 5 V) VDD-VOH(V) IOH(mA) Figure 3. All operating parameters, including “typicals,” must be validated for each customer application by customer's technical experts. To determine the value of the required current-limiting resistor, calculate resistance values for positive and negative clamp voltages, then use the large value. Power dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and voltage regulator circuits, and it is userdetermined rather than being controlled by the MCU design