Concept of NC-SO

Numerically controlled sacrificial oxidation (NC-SO) consists of two steps: numerically controlled oxidation followed by hydrofluoric acid treatment (Sano et al. 2008a). Atmospheric-pressure plasma is used for the oxidation. When plasma is generated at atmospheric pressure in the presence of oxygen gas, only the area that faces the localized plasma is oxidized, which results in the formation of an oxidation layer with an arbitrary thickness distribution by controlling the dwell time at each location on the sample. Therefore, NC-SO can be realized by controlling the dwell time of plasma exposure on each part of the surface. After oxidation, the desired surface is revealed when the sample is dipped into HF solution. An HF cleaning process is generally used as a final cleaning process in silicon wafer production. However, this final HF treatment is considered not to be necessary in NC-SO since it is performed simultaneously with the removal of the oxidation layer formed in this technique. Although NC-SO is a removal process using plasma, there is no need for fluorine-containing gases and no waste gases are generated. The oxidation rate depends on the thickness of the oxide layer and rapidly decreases when the thickness reaches several tens of nanometers. Thus, this method is suitable for finishing processes that require the removal of a small amount of material.

NC Correction of SOI Thickness Using Raster Scan System

Figure 8a shows the concept of raster scan-type NC processing, which can be realized by controlling the plasma dwelling time by the raster scan of a single electrode with controlled velocity. A commercially available p-type 300-mm SOI wafer was used to evaluate the proposed method. The thickness of the top silicon layer was approximately 60 nm, the thickness of the buried oxide layer was 145 nm, the crystal orientation was (100), and the resistivity was 8–12 Ω cm. Gas with composition He:O2 = 98:2 was used to fill the chamber to atmospheric pressure after evacuating air from the chamber. The gap between the electrode and the specimen was 0.5 mm, and the supplied RF power was 750 W. The thickness of the top silicon layer before and after the process was measured by reflection spectroscopy.

Figure 9a shows the thickness distribution of the silicon layer of an as-received 300-mm SOI wafer, and Fig. 9b shows the thickness distribution of the wafer processed by NC-SO (Sano et al. 2008b). The dispersion of the thickness and the standard deviation of the thickness variation of the silicon layer were, respectively, improved from ± 1.4 nm (p-v, 2.8 nm) and 0.33 nm to ± 0.45 nm (p-v, 0.9 nm) and 0.14 nm over a circular area with an edge exclusion (EE) of 10 mm.

NC Correction of SOI Thickness Using Electrode Array-Type System

Figure 8b shows the concept of electrode array-type NC processing, which can be realized by controlling the plasma generation time of each electrode in an array of electrodes instead of the raster scan of a single electrode (Kamisaka et al. 2010). The plasma area can be easily separated by separating the electrodes because of the small mean free path of the gas molecules under atmospheric pressure. Since the initial gap between the sample and the electrode is approximately 1 mm, the electric field intensity decreases by half upon changing the gap from 1 to 2 mm. Thus, the plasma can be easily switched on and off by small displacements of the electrode. Figure 10 shows a schematic of the NC processing system using the electrode array system. In this system, a quartz wall between the electrode array and the wafer forms a chamber for gas replacement with a very small volume, which means that supplied process gas is sufficient to replace it with air; thus, there is no need to use a vacuum pump. A prototype apparatus with 40 electrodes that covered one-sixth of the area of an 8" wafer was developed. A commercially available p-type 8" SOI wafer was used to demonstrate the proposed method. NC plasma oxidation was performed in a He:O2 = 99:1 atm with a maximum RF power of 300 W.

Figure 11 shows the thickness distribution of one-sixth of the area of a commercially available 8-in. SOI wafer before and after NC thickness correction of the SOI layers by using the electrode array system. The range and standard deviation of the thickness variation were improved from 5.9 and 1.5 nm to 3.4 and 0.8 nm, respectively; thus, it was shown that the electrode array system can be used for NC processing (Sano et al. 2010). In raster scan methods, the throughput should decrease with increasing wafer diameter because of the increase in the path length to be scanned. Thus, a faster scanning table will be required to maintain the throughput for larger wafers. On the other hand, in the electrode array system, there is no change in the throughput with increasing diameter of the wafer. Thus, it is considered that this system is effective for realizing a high-throughput simultaneous NC process for large-diameter wafers.