TFET

MOSFET은 현재 SCEs (Short-channel effects), shallow junction formation, 그리고 photolithography 공정 기술의 한계로 인해서 더 이상의 소자 크기를 감소시키는 데에 한계에 다다르게 되었다. 소자의 크기 감소의 한계를 극복하기 위해, 여러 가지 소자 구조, 반도체 물질, 동작 메커니즘 등을 기반으로 하여 연구가 진행이 되고 있다. 이러한 연구 중, TFET은 낮은 off-state current (I_off), 뛰어난 subthreshold swing (S) 특성을 가지고 있다. 하지만 on-state current (I_on)과 ambipolar 특성 등, 여러 가지 보완점이 있기에, 현재 NDSL에서는 TFET에 대해 연구를 진행 중이다.

Metal-oxide-semiconductor field-effect transistor (MOSFETs) are facing scaling limits owing to critical reliability and process issues such as short-channel effects (SCEs), shallow junction formation, and optical limit in photolithography. To overcome the scailing limits, various device based on novel structures, materials, and mechanisms have researched. The use of tunneling field-effect transistors (TFETs) is one of the solutions owing to their excellent subthreshold swing (S) and low off-state current (I_off). In spite of these advantages, low on-state current (I_on) and operation speed have been pointed as the drawbacks of silicon (Si) TFETs. For these reasons, the research of TFETs is increasing.

○ Our Research

- Design and analysis of TFETs

- Various researches in order to overcoming the limits in operation of conventional TFETs

Design and analysis of Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET)

Current Applied Physics, December 2015 [Jae hwa seo et al.]

Heteromaterial Gate Tunneling Field-Effect Transistor for High-Speed and Radio-Frequency applications

Journal of Nanoscience and Nanotechnology, November 2014 [Young Jun Yoon et al.]