Conference2017

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[2017]

78. DC and RF performance comparison of p-i-n TFET and p-n TFET

      Young Jun Yoon, Jae Hwa Seo, Jung-Hee Lee, and In Man Kang

      International Microprocesses and Nanotechnology Conference (November, 2017)

77. Analysis of Ge/GaAs heterojunction-based PN junction tunneling field-effect transistor with dual-metal-gate structure for high-performance and low-power applications

      Jae Hwa Seo, Young Jun Yoon, Min Su cho, and In Man Kang

      Applied Nanotechnology and Nanoscience International Conference (October, 2017)

76. Electrical Performances of 1T-DRAM based on PNPN Tunneling FET with asymmetric Double-Gate Structure

      Young Jun Yoon, Jae Hwa Seo, Min Su Cho, Bo Gyeong Kim, and In Man Kang

      International Conference on Solid State Devices and Materials (September, 2017)

75. Simulation of Electrical Characteristics for GaSb Junctionless Transistor

      Min Su Cho, Jae Hwa Seo, Young Jun Yoon, Bo Gyeong Kim and In Man Kang

      International Symposium on Engineering and Applied Science (August, 2017)

74. Simulation of 1T-DRAM based on Symmetric Double-Gate Si Junctionless Transistor

      Bo Gyeong Kim, Jae Hwa Seo, Young Jun Yoon, Min Su Cho, Sang Hyuk Lee, Jung-Hee Lee and In Man Kang

      The 15th International Nanotech Symposium & Nano-Convergence Expo (July, 2017)

73. Design and Analysis of Capacitorless 1T-DRAM based on Double-gate Tunneling Field Effect Transistor

      Min Su Cho, Jae Hwa Seo, Young Jun Yoon, Bo Gyeong Kim, Sang Hyuk Lee, Jung Hee Lee and In Man Kang

      The 15th International Nanotech Symposium & Nano-Convergence Expo (July, 2017)

72. Design Optimization and Analysis of Ge/GaAs-based Gate-All-Around (GAA) Arch-shaped Tunneling Field-Effect Transistor (TFET)

      Jae Hwa Seo, Young Jun Yoon, Jung-Hee Lee and In Man Kang

      The 15th International Nanotech Symposium & Nano-Convergence Expo (July, 2017)