Structural Description
module MUX4to1_struct (Y, I0, I1, I2, I3, S);
input I0, I1, I2, I3;
input [1:0] S;
output Y;
wire n0, n1;
wire t0, t1, t2, t3;
not N0 (n0, S[0]);
not N1 (n1, S[1]);
and A0 (t0, I0, n1, n0);
and A1 (t1, I1, n1, S[0]);
and A2 (t2, I2, S[1], n0);
and A3 (t3, I3, S[1], S[0]);
or O0 (Y, t0, t1, t2, t3);
endmodule
Test bench ->
module TB_MUX4to1_struct();
reg I0, I1, I2, I3;
reg [1:0] S;
wire Y;
MUX4to1_struct dut (Y, I0, I1, I2, I3, S);
initial begin
I0 = 0; I1 = 1; I2 = 0; I3 = 1;
S = 2'b00; #10
S = 2'b01; #10
S = 2'b10; #10
S = 2'b11; #10
#20 $finish;
end
endmodule
OUTPUT WAVEFORM:---