D Flipflop
THEORY:--
A D Flip-Flop (Data or Delay flip-flop) stores the value present at its D input on the triggering edge of the clock.
The output Q simply follows the input D, eliminating the “don’t care” conditions found in other flip-flops.
Its fundamental operation is Q(next) = D, meaning the output updates exactly to the input on each clock edge.
D Flip-Flops are widely used in registers, memory devices, and synchronous circuits for data storage.