BEHAVIORAL DESCRIPTION
module decoder2_4 (y, I);
input [1:0] I;
output [3:0] y;
reg [3:0] y;
always @(I)
begin
case (I)
2'b00: y = 4'b0001;
2'b01: y = 4'b0010;
2'b10: y = 4'b0100;
2'b11: y = 4'b1000;
default: y = 4'b0000;
endcase
end
endmodule
Test Bench:--
module tb_decoder2_4;
reg [1:0] I;
wire [3:0] y;
decoder2_4 uut (y, I);
initial
begin
I = 2'b00;
#10 I = 2'b01;
#10 I = 2'b10;
#10 I = 2'b11;
#20 $finish;
end
endmodule
OUTPUT
BEHAVIORAL DESCRIPTION
module decoder2_4 (y, I);
input [1:0] I;
output [3:0] y;
reg [3:0] y;
always @(I)
begin
case (I)
2'b00: y = 4'b0001;
2'b01: y = 4'b0010;
2'b10: y = 4'b0100;
2'b11: y = 4'b1000;
default: y = 4'b0000;
endcase
end
endmodule
Test Bench:--
module tb_decoder2_4;
reg [1:0] I;
wire [3:0] y;
decoder2_4 uut (y, I);
initial
begin
I = 2'b00;
#10 I = 2'b01;
#10 I = 2'b10;
#10 I = 2'b11;
#20 $finish;
end
endmodule
OUTPUT