Theory :

The XNOR (Exclusive-NOR) gate is the complement of the XOR gate.

1. It outputs HIGH (1) when the inputs are the same.

2. It outputs LOW (0) when the inputs are different.

3. That’s why it is also called the Equivalence Gate

BLOCK DIAGRAM:

Boolean expression :

Y=(A⊕B​)'=AB+A'B' 

Verilog Code :

module XNOR(y,A,B);

input A,B;

output Y;

assign Y = (A^B);

endmodule

Test bench :

module tb_XOR();

reg A,B;

wire Y;

XOR DUX(Y,A,B);

initial 

begin 

    A=1'b0 ; B=1'b0;

    #10 A=1'b0 ; B=1'b1;

    #10 A=1'b1 ; B=1'b0;

    #10 A=1'b1 ; B=1'b1;

    #20 $finish();

    end 

endmodule

OUTPUT:

Pin Assignment: 

Input A = J15

Input B = L16

Output Y = H17