Theory

The adder produce carry propagation delay while performing other arithmetic operations like multiplication and divisions as it uses several additions or subtraction steps. This is a major problem for the adder and hence improving the speed of addition will improve the speed of all other arithmetic operations. Hence reducing the carry propagation delay of adders is of great importance. There are different logic design approaches that have been employed to overcome the carry propagation problem. One widely used approach is to employ a carry look-ahead which solves this problem by calculating the carry signals in advance, based on the input signals. This type of adder circuit is called a carry look-ahead adder

    BLOCK DIAGRAM:

     TRUTH TABLE:

Boolean expression 

Pi =Ai⊕ Bi

Gi=Ai.Bi

Si =Pi⊕Ci

C​i=Gi+PiCi+1

Carry equations:   

C0 = cin

C1 = G0 | (P0 & C0)

C2 = G1 | (P1 & C1) = G1 | (P1 & G0) | (P1 & P0 & C0)

C3 = G2 | (P2 & C2) = G2 | (P2 & G1) | (P2 & P1 & G0) | (P2 & P1 & P0 & C0)

C4 = G3 | (P3 & C3) = G3 | (P3 & G2) | (P3 & P2 & G1) | (P3 & P2 & P1 & G0) | (P3 & P2 & P1 & P0 & 

  CIRCUIT DIAGRAM: