xilinx_spartan_3_nexys2_seven_segment

Switches to Seven Segment Decoder for Digilent Nexys-2 FPGA Board with Xilinx XC3S500E

I have just got Xilinix Spartan-3-S-500 FPGA board manufactured by Digilent as Nexys-2. Faced a real trouble interfacing onboard LED display and switches. A VHDL design was available online with very instructive pdf file. However my requierement was to port it to Verilog HDL. After todays effort Verilog code has eventually started working. Complete project files in zip format can be downloaded here.

// Main code File. save as *.v

`timescale 1ns / 1ps

//***************************************************************************

//     Top Level 

//***************************************************************************

module seven_seg2(

  input [7:0] switches,

  output [6:0] sevenseg,

  output [3:0] anodes

  );

  //seven_seg1 S1(.switches1(switches),.sevenseg1(sevenseg),.anodes1(anodes));

  hex2SevenSeg S2(.segCode(sevenseg), .hexIN(switches[3:0]));

  assign anodes = 4'b1110;

endmodule

//***************************************************************************

//     Decode 4-bit hex code to Seven Segment LED Display

//***************************************************************************

module hex2SevenSeg(segCode, hexIN);

  output reg [6:0] segCode;

  input [3:0] hexIN;

  //  segCode segment to bit mapping ==>  gfedcba

  always @(hexIN)

    case (hexIN)

  4'd0 : segCode =  7'b1000000;

4'd1 : segCode = 7'b1111001;

4'd2 : segCode = 7'b0100100;

4'd3 : segCode = 7'b0110000;

4'd4 : segCode = 7'b0011001;

4'd5 : segCode = 7'b0010010;

4'd6 : segCode = 7'b0000010;

4'd7 : segCode = 7'b1111000;

4'd8 : segCode = 7'b0000000;

4'd9 : segCode = 7'b0010000;

4'd10 : segCode = 7'b0001000;

4'd11 : segCode = 7'b0000011;

4'd12 : segCode = 7'b1000110;

4'd13 : segCode = 7'b0100001;

4'd14 : segCode = 7'b0000110;

4'd15 : segCode = 7'b0001110;

default :  segCode = 7'b0110110;

  endcase

endmodule

# Digilent-nexy2-spartan-3 board pin connection file, save as *.ucf

NET "anodes<0>"  LOC = "F17"; 

NET "anodes<1>"  LOC = "H17"; 

NET "anodes<2>"  LOC = "C18"; 

NET "anodes<3>"  LOC = "F15"; 

NET "sevenseg<0>" LOC = "L18"; 

NET "sevenseg<1>" LOC = "F18"; 

NET "sevenseg<2>" LOC = "D17"; 

NET "sevenseg<3>" LOC = "D16"; 

NET "sevenseg<4>" LOC = "G14"; 

NET "sevenseg<5>" LOC = "J17"; 

NET "sevenseg<6>" LOC = "H14"; 

NET "switches<0>" LOC = "G18"; 

NET "switches<1>" LOC = "H18"; 

NET "switches<2>" LOC = "K18";

NET "switches<3>" LOC = "K17";

NET "switches<4>" LOC = "L14"; 

NET "switches<5>" LOC = "L13"; 

NET "switches<6>" LOC = "N17";

NET "switches<7>" LOC = "R17";