Schematic Testbench and Simulation- 45nm

• • Prepared by Travis Schulze; Updated by Yin Sun

• We first need to create a test circuit (test bench) for testing our inverter. In the Library Manager, highlight your library and go to File >New >Cell View. In the Cell Name type cmos_inv_tb and in the View Name type schematic.

• A new schematic editing tool will appear. You are going to add the inverter instance that was created in the previous lab and connect its input pin to voltage source.

• Go to Create >Instance. Click on the Library pull down menu and select the CpE_5210 library. Select the cmos_inverter cell. Place the inverter in the middle of the editing window.

• Highlight the inverter symbol then go to Edit>Hierarchy. Click on the Descend Read, a window appears like below, and click on OK, you will get the detailed schematic of cmos_inv. Then go to Edit>Hierarchy and click on Return to go back to the original window.This will verify that the symbol is attached to the correct schematic.

• Now we want to add voltage DC sources. Go to Create >Instance. In analoglib library, under sources, independants, you will find vdc source. Place 2 Voltage sources in the test circuit, to the left of the inverter.

• Select the leftmost voltage source and in its properties, specify DC Voltage of 1V. This defines the value of VDD. Do not change any properties on the other voltage source.

• Now we want to add global ground and power lines. Left Click Create >Instance. In analoglib library, sources, globals, you will find vdd and gnd sources. Place them in the test circuit. Place the vdd above the vdc symbol and GND below the vdc symbol.

• Next we will add an output pin in the schematic. Left click Create >Pin. Name the pin Vout and specify it as an output pin. Place the pin next to the output of the inverter.

• Connect all the elements as shown in the figure bellow. To connect different elements use Create >Wire. The final schematic should like the one below:

• Save the schematic and you are ready to simulate the inverter.

Simulating the test bench:

• In the schematic of cmos_inv_tb, go to Launch > ADE L. The ADE window should appear.

• Go toSetup > Simulator/Directory/Host. A pop up window appears like below. Select Spectre as simulator. Click OK.

• Click Setup > Model Libraries and add the model files for nmos and pmos for the gpdk045 library. It is best to browse to this location not type it in directly, /opt/cadence/gpdk045_v_4_0/models/spectre/gpdk045.scs

• Now you need to choose the type of simulation, go to Analyses > Choose. In this case since we are doing dc analysis, we will choose dc. Click Component Parameter button for sweep variable. In the Sweep Range, fill 0 and 1V for the start and stop. Left click on the Select Component. Now go back to the schematic and select the voltage source you want to sweep. Click on the vdc that is connected to the input of the inverter. This will pop-up a small window, which requests the Parameter Name. Click on dc to sweep the voltage. Go back to your Analysis Choose window, which should look like the one below, and click on OK.

• Next, we need to select the signals you want to plot. Go to Outputs> To be Plotted > Select on Schematic. Click on the wire between your vdc source and the Vin pin of your inverter. Then click on the wire between the Vout pin of the inverter and the Vout pin. Both wires should change color indicating that these voltages will be plotted.

• Note: If you want to select a current to be plotted, then click on the square of a symbol where the current is flowing through. There will be a circle around the square node indicating that a current is selected.

• Your Analog Environment window should appear similar to:

• You are ready to run the simulation. Click on the Netlist and Run button (looks like a green light) on the right or go to Simulation > Netlist and Run.

• The result plot, as the one below will appear shortly. Explore the pull down menus in this window in order to customize your results. For instance, left click Axes->Strip in order to separate the different curves.

• • It is a good idea to save your state before exiting the simulator. In case you want to redo some of the simulations, you can start by loading a saved state. Go to Session > save state.

  • For more information on the various types of simulations available (transient, noise etc.), refer to Cadence help by typing cdnshelp in the terminal window.