Full Custom Design

These tutorials introduce the basic flow of full custom design with Cadence Electronic Design Automation tools.

Current GPDK 45nm Tutorials-

CMOS Inverter Schematic-45nm

Schematic Symbol Creation- 45nm

Schematic Testbench and Simulation- 45nm

Manual Layout and Extraction- 45nm

Extracted View Simulation

Legacy NCSU Library Tutorials- DO NOT use these if you are in Intro to VLSI!

Cadence Virtuoso Schematic

Cadence Symbol Creation

Test bench and Simulation with Spectre

Manual Layout, DRC, Parasitic Extraction