Extracted View Simulation-45nm

This lab will show you how to simulate the extracted view of the layout so that you can take the parasitic capacitances into account.

Create a new Cell View with the same name as your inverter testbench. Set application to hierarchy editor.

This will open the new configuration window. Click on Use Template at the bottom and select Spectre as the template.

Under View select Schematic and hit OK.

This brings you to the Hierarchy Editor.

Select the original inverter schematic not the testbench.

Select the box under "View to Use" and type av_extracted. You will then need to update the hierarchy. With This button.

When the Update Dialog box appears, Hit OK.

Then save the configuration. This will create a new cell view called config under the inverter_testbench. Open it.

When you do select the following options.

After the testbench opens it will look just like your original testbench. Perform a descend hierarchy on the inverter symbol. You should see the the extracted view not the schematic view.

This will confirm that the extracted view will be simulated.

After this you can simulate using ADE just as before. You will most likely not see much if any difference in the output wave with such small capacitances.

Important- You must use the Config cellview for your simulation. If you do not you will still be simulating the schematic view.

Only by simulating the Config view will you capture the effects of the parasitic capacitances.

Save and you are done!