March 21, 2016

Long time since my last update. The previous post introduced how we could use the PCAP interface on bare-metal to reconfigure the FPGA. It is even easier to use the DevC driver and PCAP interface on Linux to reconfigure the FPGA on a Zynq-based platform.

The Linux DevC device driver is built on top of sysfs, a virtual file system provided by Linux to export information about devices and drivers from kernel to user space. Before transferring the bitstream over the PCAP interface, the is_partial_bitstream device attribute needs to be set to 1 for a partial bitstream, or 0 for a full bitstream. A write file operation on the DevC device node is used to transfer the partial bitstream. The DevC write driver function initiates the DMA transaction and then waits for an interrupt signaling that the transfer is completed. Bitstream reconfiguration can be initiated outside a user application from a shell, for example:

% echo 1 > /sys/devices/amba.0/f8007000.devcfg/is_partial_bitstream

% cat bitstream.bin > /dev/xdevcfg

People now may wonder how fast the reconfiguration is going to be. Let me use the example given in the Xilinx documentation, as shown in the Table.

In general, based on the bitstream size, it takes a few milliseconds to program the FPGA. If you look at the "DONE" LED on Zedboard or Zybo, you will hardly notice that there is a quick flash on that light, indicating the FPGA has been successfully programmed.