Peisu Xia, Chinese female computer engineer (Chongqing, Sichuan Province 28 July 1923 –
Solved the issue of signal transmission in large scale high-speed computers (1960s)
Enunciated independently the maximum time difference pipeline principle (1968)
Designed and developed multiple parallel computers of different types
PATENTS
Held patents on inverse image topology in high speed interconnected network
A chip for arithmetic and logic unit based on maximum time difference pipeline operating principle (1980s)
With Y.X. Wang. Arithmetic/logic unit for large-scale integrated circuits. CN88108339 (1989)
With C.D. Han. Interconnection network technology for large scale parallel processing computer system. CN97116994 (1999)
Extending method for interconnect network of large scale parallel processing computer systems. CN98120058 (2000)