So far, we have learned how the digital I/O registers configure a pin. They also act as storage for any output value and input value. However, we have not answered the question of how the processor interacts with these registers. The processor should be able to both read and write to these registers. Since there are a large number of such registers, the processor should be able to say which one of these registers it wishes to read/write to. This is called "addressing." There are two possible solutions for this problem: in one, the registers have their private numbering, also known as address space. In the other solution, these registers are numbered together with memory locations of the processor.
A processor with an n-bit wide address bus has 2^n addressable locations. This set of 2^n addressable locations is called address space. The peripheral mapping scheme where the peripherals' registers have their own address space is called port-mapped I/O. This mapping scheme was popular in older processors where the address bus was 8-bit wide or 16-bit wide due to their limited number of addressable locations (2^8 and 2^16, respectively).
With larger address spaces, memory-mapped I/O became more viable. In cases like 32-bit and 64-bit processors, there exists 2^32 and 2^64 addressable locations, respectively. As such, there is plenty of space in the system memory address space for peripherals to use. MSP432, like most other modern processors, uses memory-mapped I/Os.
With port-mapped I/O, the processor requires a unique set of instructions to communicate with the peripherals. By contrast, memory-mapped I/O uses the same load/store instructions for data memory and the peripherals. As such, the processor does not distinguish peripherals from data memory, whereas with a port-mapped scheme, it does.
An n-bit processor is typically a processor whose address bus, data bus, ALU, and regsiters all have a width of n bits.