*Experiment data refer to paper :
Comparison & Reference:
D. M. Sheen , S. M. Ali , M. D. Abouzahara and J. A. Kong "Application of the three-dimensional Finite Difference Time Domain Method to the analysis of planner Microstrip Circuits", IEEE Trans. On Microwave Theory and Techniques, vol. 38, no. 7, pp.849 -857 1990
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a.(Rogers 5880, Substrate DK = 2.2)
b. Due to the PCB metal layer thickness much less than resolution delta (metal layer thickness << dz),
the metal layer will be import by using "Load Wire (*.stl)" function in 【Probe & Lumped】
In this case, wave source use "Voltage Source",checked (None)
here using the PCB : Rogers 5880, DK=2.2,
A. define the Voltage Source
B. define the Probe V & I
C. Import the metal layer, due to the PCB metal layer thickness << delta (dz)
==> using the "Load Wire (*.stl)" function
Microstrip_Top_BC.stl
Microstrip_Bottom_BC.stl
*Experiment data refer to paper :
對照引用 Comparison & Reference:
D. M. Sheen , S. M. Ali , M. D. Abouzahara and J. A. Kong "Application of the three-dimensional Finite Difference Time Domain Method to the analysis of planner Microstrip Circuits", IEEE Trans. On Microwave Theory and Techniques, vol. 38, no. 7, pp.849 -857 1990
http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=55775&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel1%2F22%2F2016%2F00055775.pdf%3Farnumber%3D55775