*Experiment data refer to paper :
Comparison & Reference:
D. M. Sheen , S. M. Ali , M. D. Abouzahara and J. A. Kong "Application of the three-dimensional Finite Difference Time Domain Method to the analysis of planner Microstrip Circuits", IEEE Trans. On Microwave Theory and Techniques, vol. 38, no. 7, pp.849 -857 1990
http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=55775&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel1%2F22%2F2016%2F00055775.pdf%3Farnumber%3D55775
*FEKO data refer to the FEKO website :
https://www.feko.info/applications/white-papers/low-pass-microstrip-filter
https://drive.google.com/open?id=18OEf1V9gk-jAW4rkCg-j3aWVQFkxCgeA
a.(Substrate DK = 2.2)
b. Due to the PCB metal layer thickness much less than resolution delta (metal layer thickness << dz),
the metal layer will be import by using "Load Wire (*.stl)" function in 【Probe & Lumped】
here using the PCB : Substrate DK=2.2,
A. define the Voltage Source
B. define the Probe V & I
C. Import the metal layer, due to the PCB metal layer thickness << delta (dz)
==> using the "Load Wire (*.stl)" function
Low_pass_sub_with_BC.stl
Low_pass_top_withBC.stl
Low_pass_bottom_withBC.stl
*Experiment data refer to paper :
Comparison & Reference:
D. M. Sheen , S. M. Ali , M. D. Abouzahara and J. A. Kong "Application of the three-dimensional Finite Difference Time Domain Method to the analysis of planner Microstrip Circuits", IEEE Trans. On Microwave Theory and Techniques, vol. 38, no. 7, pp.849 -857 1990
http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=55775&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel1%2F22%2F2016%2F00055775.pdf%3Farnumber%3D55775
*FEKO data refer to the FEKO website :
https://www.feko.info/applications/white-papers/low-pass-microstrip-filter
https://drive.google.com/open?id=18OEf1V9gk-jAW4rkCg-j3aWVQFkxCgeA