Components

Create a New Project and give the entity name as subtractor_circuit. Steps to create a new project can be found here.

If successfully done, your screen will look as follows.

First, let us create the FA.

Click on File -> New -> VHDL File.

A blank editor opens up. Click on File -> Save As -> FA

Using dataflow modeling, design the FA. The FA code must look as follows. Save the File once you have written the code.

Before compiling this file, it has to be made as the Top Level Entity. To do this go to Project -> Set as Top Level Entity.

Compile the File. To confirm if you are compiling the correct file, look for the the entity name in the Compilation Report as shown below.

Make sure you exhaustively test this component on ModelSim before creating the NOT gate component. The steps required to write a testbench and simulate it, can be found here. 

Now lets create the NOT gate component. Since the NOT gate implementation is easy, you can choose to not create this component and just write a dataflow equation in the main entity file whenever required. However, I will show you both ways. So lets create the component first.

The steps are similar to the ones you used to create the FA.

Go to File -> New -> VHDL File. 

A blank editor opens in a new tab. Click on File -> Save As -> NOT_Gate.

Write the dataflow code for a NOT gate implementation. Your code will be as follows.

Save the file.

To compile this file, we first have to set it as the Top Level Entity.

Click on Project -> Set As Top Level Entity. 

Compile the file. To see if your are compiling the correct file, check the compilation report. Look for the entity NOT_Gate.

Just as you did for the FA, exhaustively test the component by writing a testbench in ModelSim.

This concludes the creation of the two components that your design requires.