Schematic Capture

One way to design digital circuits is by using schematic capture, where, logic gates are manually connected using wires.

 As an example, we will implement the circuit shown below and verify its operation with respect to the truth table.

After you create a New Project, go to File -> New. Select Block Diagram/Schematic File.

Once you click OK, you will the screen as shown below. This is the area where you can draw the circuit.

Click on File -> Save As.

The file name will be same as the entity name that you provided while creating the Project. Ensure that the file format is of type .bdf. Click on Save.

To start placing the logic gates, use the Symbol Tool. 

In the Symbol Window, expand C -> Primitives -> Logic.

Select the and2 gate and click OK. Insert the required number of gates and hit the ESC button on your keyboard.

Your draw area will now look as follows.

Repeat the above process to insert all the required gates. For this exercise, you would require 2 not gates and 1 or2 gate.

If you want to flip the direction of a gate, right click on the gate and use the rotate options.

To connect the gates, hover to the output wire of the gate and connect it to the input of the next gate's input until you see a square box. 

Connect the rest of the gates similarly. Your final gate connections will look as follows.

The next step is to connect the input and output ports. To do this, use the Pin Tool. The circuit we are dealing with has 2 input ports and 1 output port. Choose the appropriate ports and place them on the drawing area.

Route them accordingly.

The first input name is shown as pin_name1. To change it to match the inputs in the circuit, double click in the pin tag and change the pin name to X1. Click on OK.

The final circuit diagram after renaming all the pins must look as follows. Save your design using File -> Save.

The next step is to compile your design. To compile, go to Processing -> Start Compilation. 

If your design contains no errors, compilation should be successful as shown below.

You may close the compilation report window at this stage. 

The next step is to create an HDL file from the BDF file. To do this go to, File -> Create/Update -> Create HDL Design File from Current File.

Choose VHDL and click on OK.

The VHDL file is the file required to program the FPGA. The next step is to add the newly created VHDL file to the Project.

To do this, go to Project -> Add/Remove Files in Project.

Once the settings window appears, click on Add All.

Now both the BDF file and VHDL file are added to the Project.

We now no longer need the BDF file in the Project. The BDF file can be removed by selecting it and clicking on Remove button.

Click on Apply and OK.

Open the VHDL file by double clicking on the Project in the Project Navigator.

At this instance, you can close the BDF file if you want to.

Save the VHDL file using File -> Save.

Compile the VHDL file using Processing -> Start Compilation.

If all goes well, your VHDL file should get successfully compiled.

The next step is to run the CAD simulations using ModelSim. Click here to learn about this process.