Before creating a new project, it is suggested to create a folder on C drive. Do not use cloud storage as Quartus will not give you permission to access the files.
Create a folder named "Quartus Projects" (or any other name you prefer) in Documents.
Within this folder, create another folder named "Test" (Lab1/Lab2... are preferred names). This is where all your files corresponding to one project will be saved.
Launch the Quartus software from the Start menu. Quartus opens with a window as shown below. Click on New Project Wizard.
The following dialog box opens. Click Next.
Now specify the location you want to save the Project. Remember we already created the Test folder and that is where we want to save the Project to keep everything consistent.
Give a specific name to the Project. eg: Lab1
The name of the top level design entity is automatically assigned Lab1. You may wish to keep it as it is or else you might want to change it to comb_logic (or any name you prefer).
Click Next.
Now select Empty Project and click on Next.
There are no new files to add. Click Next.
Now its time to specify the device family. This is basically the hardware that will be used to test your design.
Under Family, choose Cyclone IV E.
In Name Filter, type EP4CE115F29C7. In available devices, the device should pop up. Select the device and click on Next.
The next step involves selecting the CAD tool to perform simulations. Under Simulation, choose ModelSim-Altera as the tool and choose VHDL as the format.
A summary of all settings will be shown in this window. Make sure all settings are correct and click on the Finish button.
Upon clicking Finish, the following screen appears. In the Project Navigator (left hand side), you will see the Project that was created.
The last step is to set the path that Quartus must take to invoke ModelSim. To do this go to Tools -> Options.
Select EDA Tool Options tab. Under ModelSim-Altera, set the directory as C:\intelFPGA\20.1\modelsim_ase\win32aloem.
Note that the directory may be slightly different on your computer. Double check and ensure the correct path is provided.
Click OK.
Your project is now successfully created. Do not proceed further until you get this right.
If you now want to design using only Schematic Capture, click here.
If you now want to proceed with purely VHDL designs, click here.