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Post date: Nov 22, 2017 6:07:24 AM
A Multiplexers (MUX) is a combinational logic component that has several inputs and only one output.
MUX directs one of the inputs to its output line by using a control bit word (selection line) to its select lines.
Multiplexer contains the followings:
o data inputs
o selection inputs
o a single output
o Selection input determines the input that should be connected to the output.
The multiplexer sometime is called data selector.
The multiplexer acts like an electronic switch that selects one from different.
A multiplexer may have an enable input to control the operation of the unit.
4 to 1 Multiplexer
4-data input MUX
S1, S0 select lines.
4 Input lines.
Single output line.
Truth Table and circuit
HDL Program for 4 x 1 Multiplexer:-
Program File [ mux_4_to_1.v]
module mux4to1_gate(out,in,sel);
input [0:3] in;
input [0:1] sel;
output out;
wire a,b,c,d,n1,n2,a1,a2,a3,a4;
not n(n1,sel[1]);
not nn(n2,sel[0]);
and (a1,in[0],n1,n2);
and (a2,in[1],n2,sel[1]);
and (a3,in[2],sel[0],n1);
and (a4,in[3],sel[0],sel[1]);
or or1(out,a1,a2,a3,a4);
endmodule
Test Bench File
Refer the previous program to write Test Bench for 4 to 1 mux.
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