The current CDH design is in its flight model phase. Scroll down to UMS-0802 for the flight model design.

• The engineering model design (UMS-0586) of the CDH system is derived from the Iris CDH.

• The flight model design (UMS-0802) of the CDH system is derived from through testing of the engineering model design (UMS-0586).

• The CDH subsystem provides the hardware required to run the flight software (for the onboard computer).

The CDH subsystem model philosophy is shown in Fig. 1.

The functional block diagram in Fig. 2 shows the overall functions provided by the CDH subsystem. 

Fig. 2: CDH Functional Block Diagram

Microsemi's SmartFusion2 SoC is the main processing unit, this SmartFusion 2 is an ultra-low power, radiation tolerant SoC, with proven flight heritage [1]. The processing unit contains both a microcontroller subsystem (MSS) containing ARM Cortex-M3 as the hard-core processor and FPGA fabric, both of which are immune to single-event upsets. 

Flight software will run on ARM Cortex M3, which is a 32-bit processor that can execute 1.25 DMIPS/MHz. Running at 166-MHz, it can execute 207 DMIPS, which is sufficient for performing satellite operations with a high margin. MSS also has a 64 KB embedded SRAM (eSRAM) as the general work memory, which has a Single Error Correction and Double Error Detection (SECDED) feature. As well as a 256 KB embedded nonvolatile memory (eNVM) as the boot Memory. The FPGA fabric provides a highly flexible platform for loading custom IP cores for SPI and CAN. The TQGI144I package allows for thermal expansion of the chip. 

The CDH also provides 2 MB (16 Mb) of Avalanche's AS3016101 MRAM memory for data processing, and 0.5 MB (4 Mb) of Everspin's MR25H40MDF MRAM for safeguard and system register memory which is intrinsically immune to Single Event Upset (SEU) and qualified under AEC-Q100 [2]. The CDH also provides 2 MB (16 Mb) of Winbond's W25Q16JVZPIQ FLASH memory for in-system programming and storage of updated flight images received over the air, and a 125 MB (1 Gb) of Winbond's W25N01GVZEIG FLASH memory for mass data, logs, and sensor measurement storage.

The RTC is the central timekeeper and has a backup UL-certified coin-cell battery to power the RTC when there is no power supplied through the satellite's power bus. One SPI soft-core in the FPGA fabric will interface with the 8-channel ADC, MRAM, SRAM, flash memory, and RTC.

The Microsemi SmartFusion2 SoC does not natively have the hardware needed for a RS-485 line. Hence, the CDH FM uses two UART to RS-485 converters to allow the CDH to communicate with the star tracker and the communications transceiver. The RS-485 lines for the star tracker and communications transceiver are also different at a hardware level:

• Communications RS-485: half duplex Analog Devices Inc. ADM2461EBRWZ

• Star tracker RS-485: full duplex Analog Devices Inc. ADM2463EBRWZ

Key changes from UMS-0586 (engineering model) to UMS-0802 (flight model):

1. Addition of one UART to a half duplex RS-485 module to allow CDH to communicate between its MCU/FPGA and the communications transceiver

2. Addition of one UART to a full duplex RS-485 module to allow CDH to communicate between its MCU/FPGA and the star tracker

3. Addition of four ENABLE output pins on the main bus harnessing to allow CDH to enable/disable each reaction wheel in the cluster

4. Addition of four Chip Select (CS) pins on the main bus harnessing to allow CDH to specifically control each reaction wheel on the shared SPI bus (SPI bus shared between AODCS and four reaction wheels)

5. Change the single harnessing connector on UMS-0586 to two harnessing connectors: one 34-pin data connector and one 2-pin power connector

6. Addition of a mounting hole at the center of the board to allow an additional spacer to support the CDH from its center and reduce effects of vibration

7. Addition of one digital input pin to allow CDH to receive PPS signal (from the GNSS receiver) included in the main bus 34-pin harnessing connector. Note that this connection is only active if the signal's trace is physically jumped/shorted on CDH. For LiBus, this connection will not be shorted/jumped/enabled since the PPS signal from the GNSS is used by the payload avionics and not the CDH