RESEARCH TOPICS

Computing-in-Memory for Machine Learning Applications

CMOS technology scaling has faced unprecedented challenges because of the power wall and slower voltage scaling. Besides, traditional von-Neumann computing architecture suffers from long latency and high power/energy consumption because of the data movements between memory and arithmetic-logic units (ALUs). The latency and the power/energy consumption become more severe as the memory hierarchy goes from a register file to cache memory, main memory (e.g., DRAM), and non-volatile storage (e.g. FLASH). Beyond von-Neumann architecture like computing in-memory (CIM) can tackle the above issues by reducing the data movement between ALUs and memory. However, CIMs also have various design issues such as accuracy, data conversion, configurabiity, etc. In this research, we are developing various CIM design techniques that allow CIM to be employed by various machine learning and artificial intelligence hardware.

Robust Low Power and Low Voltage Memory Design

Memory is a critical building block in numerous applications. The density of memory has been dramatically increased following Moore's law. However, design of memory is evermore challenging due to various requirements such as small device sizes, low voltage operation, and low power consumption. Small device sizes are significant in memory design to improve the area efficiency even if they show larger process fluctuations. The process fluctuations are becoming even worse in more advanced technologies. The process fluctuations deteriorate memory cell stability and write/read operations more likely generating failures. Low voltage operation and low power consumption are also highly required to increase power/energy efficiency and battery lifetime. One example of low voltage and low power memory is subthreshold SRAMs for the minimum energy consumption. They have various promising applications such as implantable biomedical devices, portable electronics, wireless sensor nodes, and so forth. In this research topic, we are developing different types of memories including Static Random Access Memories (SRAMs), Embedded Dynamic Random Access Memories (eDRAMs), Resistive Random Access Memories (ReRAMs)with variation tolerance, robust low voltage operation and ultra low power consumption.

Subthreshold and Near-subthreshold Circuit Design for Energy Efficient Systems

Emerging applications such as portable devices, medical instruments, and wireless sensor networks demand extremely low supply voltages in order to meet stringent power/energy budgets. Subthreshold circuits, which operate at supply voltages lower than the threshold voltage , are considered to be promising candidates for ultra-low power systems where operating speed is not the primary design concern. However, subthreshold circuits suffer from strong sensitivity to Process, Voltage, and Temperature (PVT) fluctuations, and unreliable ultra-low voltage operation. In this research topic, we are doing research on reliable subthreshold circuit design exploring from device level to circuit and architecture levels.

Ultra-low Power Mixed-signal Circuit Design for IoT and Edge Computing

IoT and edge computing hardware are desired to consume ultra-low power consumption so that the main power can be supplied by battery or energy harvesting devices. However, the amount of energy harvested by the energy harvesting devices is limited, which impose various design challenges in the energy harvesting systems. First, the energy harvesting systems should sleep and wake up depending on the availability of power/energy from the energy harvesting devices. This will significantly expand the lifetime of the systems since no battery replacement is necessary. Besides, ultra-low power consumption is another challenge in the energy harvesting systems. The harvested power is in the micro-Watt range, the energy harvesting system need to consume much lower power so that majority of the harvested power/energy can be transferred to the target applications.

Data conversion is a fundamental function in IoT and edge computing since they process various signals captured by different types of sensors. Ultra-low power data conversion is highly demanded since the target systems are mostly powered by batteries or energy harvesting circuits. Reconfiguration is another feature required in data conversion for IoT and edge computing whose precision can vary depending on the operation conditions. Area efficient data conversion is also highly in computing-in-memory (CIM) since conventional data converters lead to significant area overhead when employed in CIM. In this research, we develop non-conventional data conversion techniques targeting IoT and CIM application.

Circuit Reliability Monitor and Aging Tolerant Design

Long term device reliability issues such as Bias Temperature Instability (BTI), Hot Carrier Injection (HCI), and Time Dependent Dielectric Breakdown (TDDB) are emerging as challenging issues that limit the life time of Integrated Circuits (ICs) and VLSI systems. Circuit aging caused by the device reliability issues not only degrades the performance of systems but also can generate hard failures. The reliability issue become exacerbated in advanced technologies where circuit and architecture level solutions are strongly required. In this research topic, we are investigating various circuit techniques that can accurately measure the aging effect in different types of circuits. The long-term goal of this topic is to design aging-tolerant systems.

Circuit Techniques for 3-dimensional (3D) ICs

3D ICs have drawn a lot of interests due to the benefits of performance improvement, complex system integration, and small foot print. However, stacking dies has raised many challenging issues such as power and thermal issues, system optimization, and reliable interconnections. In this research topic, we are doing research on various circuit solutions for 3D ICs. Wireless interconnection between stacked dies, thermal and power management, and system level integration.

Nano ElectroMechanical Switch (NEMS) based memory design

The International Technology Roadmap for Semiconductors (ITRS) has recently considered NEM switches as a novel device concept with numerous promising applications. Compared to CMOS technologies, electro-mechanical switches are attractive since they have zero off-state leakage, simple fabrication process, good reliability, moderate to high density integration, wide operating temperature range and smaller temperature impact on device characteristics. In this research topic, we aim to develop a combined fabrication platform for both electro-mechanical logic and memory devices on a same substrate for high-temperature computation. To achieve this, we will develop models of NEMS based logic and memory devices. The final goal of this research topic is to design memories, fully controlled by electro-mechanical logic circuits, for applications with severe operating conditions.