2018
Conference
[ISOCC'18] S. M. Siddiqui, R. Sharma, V. L. Le, T. Yoo, I.-J. Chang, and T. Kim, "A Radiation Hardened SRAM with Self-refresh and Compact Error Correction," 15th International SoC Design Conference, pp. 235-236, Nov. 2018 [Paper]
[ISOCC'18] K. Lim, M. Choi, M.-T.-L. Aung, K. Kim, J.-Seong Kim, R.-H. Baek, H.-J. Song, T. Kim, and B. Kim, "Experimental Verification of a Simple, Intuitive, and Accurate Closed-Form Transfer Function Model for Diverse High-Speed Interconnects," 15th International SoC Design Conference, pp. 239-240, Nov. 2018 [Paper]
[ISOCC'18] D. V. Thai, B.-Y. Jung, K.-H. Baek, T. Yoo, and T. Kim, "A 12-bit 200-MS/s Pipelined ADC using Maximization of Settling Time Scheme," 15th International SoC Design Conference, pp. 97-98, Nov. 2018 [Paper]
[ISOCC'18] J. Y. Kweon, J. T. Choi, Y.-H. Song and T. Kim, "Leakage Control System Using Data Estimation of Resistive Memory," 15th International SoC Design Conference, pp. 96-97, Nov. 2018 [Paper]
[A-SSCC'18] K. Rawy, R. Sharma, H.-J. Yoo, U. Khan, S.-W. Kim, and T. Kim, "An 88% Efficiency 2.4µW to 15.6µW Triboelectric Nanogenerator Energy Harvesting System Based on a Single-Comparator Control Algorithm," IEEE Asian Solid-State Circuits Conference, pp. 33-36, Nov. 2018 [Paper]
[A-SSCC'18] [Invited to JSSC] L. Lu, T. Yoo, V. L. Le and T. Kim, "An Ultra-low Power 8T SRAM with Vertical Read Word Line and Data Aware Write Assist," IEEE Asian Solid-State Circuits Conference, pp. 143-144, Nov. 2018 [Paper]
[A-SSCC'18] T. Yoo*, V. L. Le*, J. E. Kim, N. L. Ba, K.-H. Baek and T. Kim, "A 137-μW Area-Efficient Real-Time Gesture Recognition System for Smart Wearable Devices," IEEE Asian Solid-State Circuits Conference, pp. 277-280, Nov. 2018 (*equally contributed) [Paper]
[ISICAS'18] D.-K. Jung, Y.-H. Jung, T. Yoo, D.-H. Yoon, B.-Y. Jung, T. Kim, and K.-H. Baek, "A 12-bit Multi-Channel R-R DAC using a Shared Resistor String Scheme for Area-Efficient Display Source Driver," International Symposium on Integrated Circuits and Systems, Sept. 2018
[ISCAS'18] [Invited to TCAS-II] V.-L. Le and T. Kim, "An Area and Energy Efficient Ultra-Low Voltage Level Shifter with Reduced-Swing Output Buffer," IEEE International Symposium on Circuits and Systems, May 2018
[ICEIC'18] T. Yoo, Y. Choi, D.-H. Yoon, J.-S. Lee, T. Kim, and K.-H. Baek, "A 10Gbps 2-tap pre-emphasis technique for current-mode logic driver in 55nm CMOS," International Conference on Electronics, Information, and Communication, Jan. 2018
Journal
[TCAS-I'18] D.-K. Jung, Y.-H. Jung, T. Yoo, D.-H. Yoon, B.-Y. Jung, T. Kim, and K.-H. Baek, "A 12-bit Multi-Channel R-R DAC using a Shared Resistor String Scheme for Area-Efficient Display Source Driver," IEEE Transactions on Circuits and Systems-I, Vol. 65, pp. 3688-3697, Nov. 2018 [Paper]
[TPEL'18] N.-S. Pham, T. Yoo, T. Kim, C.-G. Lee, K.-H. Baek, "A 0.016mV/mA Cross-regulation 5-Output SIMO DC-DC Buck Converter Using Output-Voltage-Aware Charge Control Scheme," IEEE Transactions on Power Electronics, Vol. 33, pp. 9619-9630, Nov. 2018 [Paper]
[JSSC'18] [Invited] K. Rawy, T. Yoo and T. Kim, "An 88% Efficiency 0.1-300-µW Energy Harvesting System with 3-D MPPT Using Switch Width Modulation for IoT Smart Nodes," IEEE Journal of Solid-State Circuits, Vol. 53, pp. 2751-2762, Oct. 2018 [Paper]
[JSSC'18] [Invited] V. L. Le, J. Lee, A. Chang and T. Kim, "A 0.4-V 0.138-fJ/Cycle Single-Phase-Clocking Redundant-Transition-Free 24T Flip-Flop with Change-Sensing Scheme in 40-nm CMOS," IEEE Journal of Solid-State Circuits, Vol. 53, pp. 2806-2817, Oct. 2018 [Paper]
[TCAS-I'18] N. L. Ba and T. Kim, "An Area Efficient 1024-point Low Power Radix-22 FFT Processor with Feed-fordward Multiple Delay Commutators," IEEE Transactions on Circuits and Systems-I, Vol. 65, pp. 3291-3299, Oct. 2018 [Paper]
[TCAS-II'18] [Invited] V.-L. Le and T. Kim, "An Area and Energy Efficient Ultra-Low Voltage Level Shifter with Pass Transistor and Reduced-Swing Output Buffer in 65-nm CMOS," IEEE Transactions on Circuits and Systems-II, Vol. 65, pp. 607-611, May 2018 [Paper]
[JLPEA'18] M. Jayakrishnan, A. Chang, and T. Kim, "Opportunistic Design Margining for Area and Power Efficient Processor Pipelines in Real Time Applications," Journal of Low Power Electronics and Applications, 8, no. 2: 9. [Paper]
[SSE'18] T. Kim, Z. Lee, and A. Do, "A 32kb 9T Near-threshold SRAM with Enhanced Read Ability at Ultra-low Voltage Operation," Solid-State Electronics, Vol. 139, pp. 60-68, Jan. 2018 [Paper]
