2022
Conference
[A-SSCC'22] [Invited to LSSC] X. Zhang*, Y. Jo*, J. Liu, J. Zhou, Y. Zheng, and T. Kim, "A Local Transpose 9T SRAM Compute-In-Memory Macro with Programmable Single-Slope SAR ADC," IEEE Asian Solid-State Circuits Conference, Nov. 2022, pp. 6-8, doi: 10.1109/A-SSCC56115.2022.9980672 [Paper] (* equally contributed authors)
[A-SSCC'22] [Invited to LSSC] J. E. Kim, D.-H. Yoon, J. Song, K.-H. Baek, J.-H. Choi, and T. Kim, "A 6 Gbps PAM-3 Transceiver with Time-Varying Offset Compensation," IEEE Asian Solid-State Circuits Conference, Nov. 2022, pp. 1-3, doi: 10.1109/A-SSCC56115.2022.9980713 [Paper]
[ISOCC'22][Invited: Special Session] Y. Lu, Z. Li, X. Zhang, and T. Kim, "A Low-Power Gesture Recognition System Utilizing Hybrid Tiny Classifiers," 19th International SoC Design Conference, Oct. 2022, pp. 245-246, doi: 10.1109/ISOCC56007.2022.10031331 [Paper]
[ESSCIRC'22] D.-H. Yoon, K.-H. Baek, and T. Kim, "A 2.5 GHz 104 mW 57.35 dBc SFDR Non-linear DAC-based Direct-Digital Frequency Synthesizer in 65 nm CMOS Process," IEEE European Solid-State Circuits Conference, Sept. 2022, pp. 241-244, doi: 10.1109/ESSCIRC55480.2022.9911334 [Paper]
[ESSCIRC'22] J. Mu, C. Yu, T. Kim, and B. Kim, "A Scalable Bit-Serial Computing Hardware Accelerator for Solving 2D/3D Partial Differential Equations Using Finite Difference Method," IEEE European Solid-State Circuits Conference, Sept. 2022, pp. 353-356 doi: 10.1109/ESSCIRC55480.2022.9911460 [Paper]
[AICAS'22][Live Demo] Y. Lu, Z. Li, X. Zhang, and T. Kim, "A 181μW Real-Time 3-D Hand-Gesture Recognition System for Edge Applications," IEEE International Conference on Artificial Intelligence Circuits and Systems, June 2022, pp. 502-502, doi: 10.1109/AICAS54282.2022.9869899 [Paper]
[ISCAS'22] Y. Chen, J. Mu, H. Kim, L. Lu, and T. Kim, "A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory," IEEE International Symposium on Circuits and Systems, May 2022, pp. 2556-2560, doi: 10.1109/ISCAS48785.2022.9937509 [Paper]
[CICC'22] Y. Lu, Z. Li, Y. Chen, and T. Kim, "A 181μW Real-Time 3-D Hand Gesture Recognition System based on Bi-directional Convolution and Computing-Efficient Feature Clustering," IEEE Custom Integrated Circuits Conference, Apr. 2022, pp. 1-2, doi: 10.1109/CICC53496.2022.9772866 [Paper]
[ISSCC'22][Student Travel Grant Award] Y. Su, T. Kim, and B. Kim, "FlexSpin: A Scalable CMOS Ising Machine with 256 Flexible Spin Processing Elements for Solving Complex Combinatorial Optimization Problems," IEEE International Solid-State Circuits Conference, Feb. 2022, pp. 1-3, doi: 10.1109/ISSCC42614.2022.9731680 [Paper]
Journal
[JSSC'22] C. Yu, T. Yoo, K. Chai, T. Kim, and B. Kim, "A 65nm 8T SRAM Compute-In-Memory Macro with Column ADCs for Processing Neural Networks," IEEE Journal of Solid-State Circuits, vol 57, pp. 3466-3476, Nov. 2022 [Paper]
[TCAS-I'22] V. Sharma, H. Kim, and T. Kim, "A 64Kb Reconfigurable Full-Precision Digital ReRAM-Based Compute-In-Memory for Artificial Intelligence Applications," IEEE Transactions on Circuits and Systems-I, vol 69, pp.3284-3296, Aug. 2022 [Paper]
[TVLSI'22] D.-H. Yoon, D.-K. Jung, K. Seong, T.-H. Eom, J.-S. Han, J. E. Kim, T. Kim, and K.-H. Baek, "A 3.2 GHz 178 fsrms Jitter Sub-Sampling PLL/DLL-Based Injection Locked Clock Multiplier," IEEE Transactions on VLSI Systems, vol. 30, pp. 915-925, July 2022 [Paper]
[JETCAS'22][Guest Editorial] T. Kim, B. Kim, J.-Y. Kim, and J. Kulkarni, "R evolution of AI and Machine Learning With Processing-in-Memory (PIM): From Systems, Architectures, to Circuits," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 12, pp. 333-337, June 2022 [Paper]
[JETCAS'22] D. Kim, C. Yu, S. Xie, Y. Chen, J.-Y. Kim, B. Kim, J. Kulkarni, and T. Kim, "An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 12, pp. 338-353, June 2022 [Paper]
[JETCAS'22] V. Sharma, J.-E. Kim, L. Lu, and T. Kim, "A Reconfigurable 16Kb AND8T SRAM Macro with Improved Linearity for Multi-bit Compute-In Memory of Artificial Intelligence Edge Devices," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 12, pp. 522-535, June 2022 [Paper]
[TCAS-I'22] L. Lu, T. Yoo, and T. Kim, "A 6T SRAM Based Two-Dimensional Configurable Challenge Response PUF for Portable Device System," IEEE Transactions on Circuits and Systems-I, vol. 69, pp. 2542 - 2552, June 2022 [Paper]
[TCAS-II'22] L. Lu and T. Kim, "A High Reliable SRAM-Based PUF with Enhanced Challenge-Response Space," IEEE Transactions on Circuits and Systems-II, vol. 69, pp. 589-593, Feb. 2022 [Paper]
Book
J.-Y. Kim, B. Kim, and T. Kim "Processing-in-Memory for AI from Circuits and Systems," Springer [Book]
