Pulse eater / Local clock divider
List 1 . {Blocks with pulse eater circuitry whose output generates both div1/div2 clk waveforms eg: hm_ae , hm_iop}
List 2 . {Blocks with pulse eater circuitry whose output generates only div2 clk waveforms eg: hm_ae , hm_conv_n/s}
List 3 . {Blocks with non-pulse eater circuitry (50% duty cycle waveform) generating a div2 clk waveform eg: hm_mac}
https://drive.google.com/file/d/1_DXI6jTATC8n5DuqkQk4U7rHpPtiRZj5/view?usp=drive_link
[02/04]
PN99.1 Mercury release
https://drive.google.com/file/d/1qg3__t3XeI-0rc9jhFGogoTfTO_s7tgF/view?usp=drive_link
[02/15]
newgrp design_apd
cd /project/mercury
/bin/bash
. /project/mercury/bin/chip_env_PN99.1 -proj_dir PN99.1.postdft.02152025 -prog_desc PN99.1
export DROP_DATA=/project/mercury/source/PN99.1/80_blockdrop/PN99.1.fp14.02172025
export MY_BLOCK=<your block name here - see the list below>
export MY_BLOCK_ROOT=$BLOCKPATH/$MY_BLOCK
/project/mercury/bin/mercury_block_setup
cd $GEV_PROJECT_ROOT/user/$USER/$PROJECT_DIR/impl/$MY_BLOCK
cp -rf /project/mercury/source/PN99.1/80_blockdrop/PN99.1.fp14.02172025/${MY_BLOCK}/${MY_BLOCK}.LEQ_info.tcl scripts/con/.
###cp -rf /project/mercury/source/PN99.1/80_blockdrop/PN99.1.fp14.02172025/${MY_BLOCK}/${MY_BLOCK}.sdc source/.
cd $GEV_PROJECT_ROOT/user/$USER/$PROJECT_DIR/impl/$MY_BLOCK
cat $GEV_PROJECT_ROOT/user/$USER/$PROJECT_DIR/impl/$MY_BLOCK/scripts/con/${MY_BLOCK}.trc_waivers | gawk '/nochain_flop_instance/ {print $2}' > SIZE_ONLY
cat $GEV_PROJECT_ROOT/user/$USER/$PROJECT_DIR/impl/$MY_BLOCK/scripts/con/${MY_BLOCK}.tetrc_waivers | gawk '/nochain_flop_instance/ {print $2}' | sed "s/\\///g" >> SIZE_ONLY
sort -u SIZE_ONLY > source/${MY_BLOCK}.size_only_list.tcl
BlockList:
- hm_ae
- hm_be
- hm_clipi
- hm_clipo
- hm_conv_n
- hm_conv_s
- hm_dl
- hm_efr_n
- hm_efr_s
- hm_fh_n
- hm_fh_s
- hm_grad
- hm_iop
- hm_l1dl
- hm_l1ul
- hm_mac
- hm_msix
- hm_pss
- hm_ulcap
- hm_xlgx
- pcie_ss_pcie_0
- pss_subsys_nokmercury
Thu, Mar 6, 2025 at 10:05 AM
/project/mercury/source/PN99.1/50_fp/PN99.1.fp14/mercury_top/pad_deliverbles_04032025/to_DI_Mercury_PN99_pad_block_build_files_030425.tar.gz
Please build the database with "hm_io_e" deliverables, i wanted to see if the corner bump short at top level will cause any issue.
Mon, Mar 10, 2025 at 11:21 AM
Please find the "hm_mac" and "hm_pss" new DEF's with clock port movement in the below location.
/project/mercury/source/PN99.1/80_blockdrop/PN99.1.fp14.mac_pss.02102025
Tue, Mar 11, 2025 at 3:42 PM : PLL
/project/mercury/source/PN99.1/80_blockdrop/PN99.1.fp14.03112025
Rahul:
nv_top_pcie_pll_0 (Matching to be done for line0 and line1)
Nitish:
lv_top_core_pll_0
sbus_qmmi_qmmi_pll_wrapper_0 (Level shifting is present )
nv_top_mcu_pll_0
Note: Don't move the PLL block inside the block. Its location needs to be kept the same.
Wed, Mar 12, 2025 at 10:50 PM
/project/mercury/source/PN99.1/80_blockdrop/PN99.1.fp14.context_defs.03122025
Let me know if you see any issues. As the first check, please see if the context DEF's mesh is aligning in M18 & M19 with Block level mesh.