Macro placement guidelines
Left / Right Spacing
Left/right macro to macro with no power - 0.576 um
Left/right Macro to macro with 3x power : 10.908
Left/right macro to block edge - 0.576 um
Top / Bottom Spacing
Top/Bottom macro to macro with no power - 0.650 um
Top/Bottom Macro to macro with 3x power : 8
Top/Bottom macro to block edge - 0.650 um
STEPS FOR FLOORPLAN :
raven -E block_tools create_ip_list $MY_BLOCK
cd block_tools/floorplan/tmp
qinvs -v 23.33-s082_1 -c 16 -m 50 -s ../../fscripts/floorplan.tcl
## Place macros
## check macro spacing ##########
MINIMUM SPACING CHECKS :
#Left/right macro to block edge - 0.576 um
report_narrow_channel -active_objects {macro} -direction y -width 0.576
#Top/Bottom macro to block edge - 0.650 um
report_narrow_channel -active_objects {macro} -direction x -width 0.650
source /project/mercury/bin/block_scripts//create_boundary_marker.tcl
#################### ITERATE TILL DRC IS CLEAN ###############
clearDrc
report_narrow_channel -active_objects {macro} -width 10.908
##### REMOVE HORIZONTAL MARKERS
foreach y [ dbGet top.markers ] {
if { [ dbGet $y.box_sizex ] > [ dbGet $y.box_sizey ] } {
select_obj $y
}
}
deleteSelectedFromFPlan
######## TO IDENTIFY THE PROBLAMATIC MARKERS FOR FP CHANGE
foreach y [ dbget top.markers ] {
if { [llength [ dbQuery -areas [dbGet $y.box ] -objType instTerm ] ] == 0 } {
select_obj $y
}
}
deleteSelectedFromFPlan
#####################
similarly check horizontal spacing
clearDrc
report_narrow_channel -active_objects {macro} -width 8 -direction x
## check for macro origins to be on grid
agCheckInstOriginOnGrid *
## If not, Ensure they are on Grid
agCheckInstOriginOnGrid -snap_origin ; #If not , ensure they are on grid
Recheck the narrow channel spacing once gain
## Ensure that atleast one M18 VDD stripe is there within horizontal channel
source /home/matumulu/mercury/emulate_vss_vdd.tcl
## Check for macro overlaps
deselectAll
selectInst [dbGet -e top.insts.cell.baseClass -v core -p2]
checkPlace -selectedOnly
deselectAll
## Check for macro overlaps
Puts "INFO: adding required blockages before power and context insertion"
set printBeginTime [clock seconds]
Puts "WARNING: removing all macro halos with deleteHaloFromBlock before adding endcap cells"
################### START FILLING NON PIN SIDE SPACE WITH BLOCKAGE WITH PROPER ALLIGNMENT ###################
clearDrc
report_narrow_channel -active_objects {macro} -width 10.908
##### REMOVE HORIZONTAL MARKERS
foreach y [ dbGet top.markers ] {
if { [ dbGet $y.box_sizex ] > [ dbGet $y.box_sizey ] } {
select_obj $y
}
}
deleteSelectedFromFPlan
foreach y [ dbget top.markers ] {
if { [llength [ dbQuery -areas [ dbShape [dbGet $y.box ] SIZEY -0.1 ] -objType inst ] ] == 0 } {
select_obj $y
}
}
deleteSelectedFromFPlan
deleteHaloFromBlock -allMacro
Puts "WARNING: removing all route blockage with ag_delete_rt_blockage before adding endcap cells"
ag_delete_rt_blockage
ag_add_obs_endcap
Puts "INFO: adding context with ag_add_endcap, modify settings in fscripts/invs_fplan_procs.tcl"
We should add hard blockage prior to “ag_add_endcap” to ensure that unwanted M0 shorts with welltaps are avoided in the channels that are less than the threshold value of “$mergeX * 2” [ default 10.908 microns ] .
ALL NON STANDERD CELL AREAS HAS TO COVERED BY HARD BLOCKAGE BEFORE "ag_add_endcap"
foreach y [dbGet top.markers.userType narrowChannels -p1] {
#createPlaceBlockage -type hard -box $y -name NO_PIN_BLOCKAGE
set x1 [ dbGet $y.box_llx ]
set y1 [ expr [ dbGet $y.box_lly ] - 2 ]
set x2 [ dbGet $y.box_urx ]
set y2 [ expr [ dbGet $y.box_ury ] + 2 ]
set yy2 [ dbGet $y.box_ury ]
#createPlaceBlockage -type hard -box "$x1 $y1 $x2 $y2" -name NO_PIN_BLOCKAGE
foreach y [dbGet [dbQuery -areas "$x1 $y1 $x2 $y2" -objType { pBlkg } ].boxes ] {
createMarker -type assist_pblk -bbox [lindex $y 0 ]
}
set new_y1 [ lindex [lsort -real -increasing [dbGet [dbGet [dbGet top.markers.userType assist_pblk -p1 ] {.box_lly > $y1 } ].box_lly ] ] 0 ]
set new_y2 [lindex [lsort -real -increasing [dbGet [dbGet [dbGet top.markers.userType assist_pblk -p1 ] {.box_ury < $y2 && .box_ury > $yy2 } ].box_ury ] ] end ]
createPlaceBlockage -type hard -box "$x1 $new_y1 $x2 $new_y2" -name NO_PIN_BLOCKAGE
select_obj [dbGet top.markers.userType assist_pblk -p1 ]
deleteSelectedFromFPlan
}
############ COMPLETETED FILLING NON PIN SIDE CHANNEL ##################
############## START FILLING NON STD CELL BOUNDARY #################
clearDrc
report_narrow_channel -active_objects {macro core} -width 7
source /home/matumulu/mercury/INTERFACE
foreach y [dbShape [dbGet [dbGet top.markers.userType BOUNDARY -p1 ].box ] AND [ dbGet [dbGet top.markers.userType narrowChannels -p1 ].box ] ] {
createMarker -bbox $y -type boundary_vio
}
deselectAll
select_obj [dbGet top.markers.userType BOUNDARY -p1 ]
select_obj [dbGet top.markers.userType narrowChannels -p1 ]
deleteSelectedFromFPlan
deselectAll
foreach y [ dbGet top.markers ] {
set l [llength [ dbQuery -areas [ dbGet $y.box ] -objType { inst } ] ]
if {$l > 1 } {
select_ob $y
}
}
deleteSelectedFromFPlan
foreach y [ dbGet top.markers ] {
if { [ dbGet $y.box_sizex ] > [ dbGet $y.box_sizey ] } {
set x1 [ expr [ dbGet $y.box_llx ] -2 ]
set y1 [ dbGet $y.box_lly ]
set x2 [expr [ dbGet $y.box_urx ] + 2 ]
set xx2 [ dbGet $y.box_urx ]
set y2 [ dbGet $y.box_ury ]
foreach y [dbGet [dbQuery -areas "$x1 $y1 $x2 $y2" -objType { pBlkg } ].boxes ] {
createMarker -type assist_pblk -bbox [lindex $y 0 ]
}
set new_x1 [ lindex [lsort -real -increasing [dbGet [dbGet [dbGet top.markers.userType assist_pblk -p1 ] {.box_llx > $x1 } ].box_llx ] ] 0 ]
set new_x2 [lindex [lsort -real -increasing [dbGet [dbGet [dbGet top.markers.userType assist_pblk -p1 ] {.box_urx < $x2 && .box_urx > $xx2 } ].box_urx ] ] end ]
createPlaceBlockage -type soft -box "$new_x1 $y1 $new_x2 $y2" -name BORDER_BLOCKAGE
select_obj [dbGet top.markers.userType assist_pblk -p1 ]
deleteSelectedFromFPlan
}
}
foreach y [ dbGet top.markers ] {
if { [ dbGet $y.box_sizex ] < [ dbGet $y.box_sizey ] } {
set x1 [ dbGet $y.box_llx ]
set y1 [ expr [ dbGet $y.box_lly ] - 2 ]
set x2 [ dbGet $y.box_urx ]
set y2 [ expr [ dbGet $y.box_ury ] + 2 ]
set yy2 [ dbGet $y.box_ury ]
foreach y [dbGet [dbQuery -areas "$x1 $y1 $x2 $y2" -objType { pBlkg } ].boxes ] {
createMarker -type assist_pblk -bbox [lindex $y 0 ]
}
set new_y1 [ lindex [lsort -real -increasing [dbGet [dbGet [dbGet top.markers.userType assist_pblk -p1 ] {.box_lly > $y1 } ].box_lly ] ] 0 ]
set new_y2 [lindex [lsort -real -increasing [dbGet [dbGet [dbGet top.markers.userType assist_pblk -p1 ] {.box_ury < $y2 && .box_ury > $yy2 } ].box_ury ] ] end ]
createPlaceBlockage -type soft -box "$x1 $new_y1 $x2 $new_y2" -name BORDER_BLOCKAGE
select_obj [dbGet top.markers.userType assist_pblk -p1 ]
deleteSelectedFromFPlan
}
}
clearDrc
deselectAll ; select_obj [dbGet top.FPlan.pBlkgs.name BORDER_BLOCKAGE -p1 ] ; writeFPlanScript -selected -fileName BORDER_PBLK.rpt ; deleteSelectedFromFPlan
#############################################################################
#####Some new E4*BORDERINTCORNERPRIGHTTIEP and P4*BORDERINTCORNERPRIGHTTIEP cells are causing LUP failures on some designs. ##########We will need to rework how this cell is included, but for now please reset the variables below before running ag_add_endcap.
set DefaultVertHaloNCellOtsdCrnr [ list ${stdcell_pfx_letter}3UNRA_BORDERINTCORNERNRIGHT ${stdcell_pfx_letter}3UNRA_BORDERINTCORNERNRIGHTTIEP ]
set DefaultVertHaloPCellOtsdCrnr [ list ${stdcell_pfx_letter}3UNRA_BORDERINTCORNERPRIGHT ${stdcell_pfx_letter}3UNRA_BORDERINTCORNERPRIGHTTIEN ]
ag_add_endcap
ag_add_rt_blockage
# Check for pin overlaps before power grid creation
setPinConstraint -spacing 1 -global
checkPinAssignment -report_violating_pin -outFile before_power.rpt
(all blocks except hm_pss, pcie_ss_pcie_0, & pss_subsys_nokmercury) :
#source $CHIPROOT/designers/matthew/vddm_power.tcl
#source /project/mercury/designers/matthew/vddm_power.tcl
#source /project/mercury/bin/block_scripts/vddm_power_version2.tcl
#source /project/mercury/bin/block_scripts/vddm_power_version3.tcl
#source /project/mercury/bin/block_scripts/vddm_power_version4.tcl
source /project/mercury/bin/block_scripts/vddm_power_version5.tcl
deselectAll ; select_obj [dbGet top.FPlan.rBlkgs.name temp_power_block -p1 ] ; deleteSelectedFromFPlan
source BORDER_PBLK.rpt
(hm_pss, pcie_ss_pcie_0, & pss_subsys_nokmercury ,hm_msix)
ag_add_power_grid
set s_width 25
setFinishFPlanMode -activeObj {macro macroHalo core hardblkg softblkg partialblkg} -override true
finishFloorplan -fillPlaceBlockage partial $s_width -deadArea [expr $s_width*$s_width] -density 50
source /home/matumulu/mercury/cut_partial_blk.tcl
deselectAll ; select_obj [dbGet [dbGet top.fplan.pBlkgs.type partial -p].name finishfp_place* -p]
cutPartialBlkg 10 10 finishfp_place
NOTE : NEED TO TAKE CARE OF SOFT BLK
##########deselect_obj [dbGet selected.objType -v pBlkg -p ] ; deselect_obj [ dbGet selected.type -v partial -p ]
check:
verify_PG_short
verify_PG_short -no_routing_blkg
verifyPowerVia -checkWirePinOverlap -ignore_partial_overlap true -layerRange { M6 M7 }
verifyPowerVia -checkWirePinOverlap -ignore_partial_overlap true
source /project/mercury/bin/block_scripts/fix_missing_via.tcl
#set_table_style -nosplit true
set_table_style -nosplit -no_frame_fix_width
report_analysis_coverage -verbose untested > analysis_coverage.rpt
check_timing -verbose > check_timing.rpt
saveDesign $DST_DATA_DIR/${DESIGN}.enc -tcon
ag_def_out_route $DST_DATA_DIR "";
exec mv ../../../source/${DESIGN}.def.gz ../../../source/${DESIGN}.def.bak.gz
exec rsync -a $DST_DATA_DIR/${DESIGN}.def.gz ../../../source/${DESIGN}.def.gz
PREP:
raven -E prep cal_drc promote $MY_BLOCK
DEF FOR SYN:
foreach y [dbGet [dbGet top.insts.cell.baseClass block -p2 ].box ] {
set B [ dbShape $y SIZE 1.4 ]
createPlaceBlockage -box $B -type hard -name context_cover
}
ag_delete_endcap
ag_delete_power_grid
deselectAll
editSelect -net VDDM -object_type { wire via }
editSelect -net VDDM -physical_pin_only -layer M19
deleteSelectedFromFPlan