Mercury

This should essentially get run in lieu of the ag_add_power_grid for the blocks with dual rail memories (almost all of them). NOTE : It has at the top of the script a margin variable that it uses to combine macros that are close enough to not get other power grid inserted in between them. I'm not sure what value to set that to exactly - it might need modification by the block builders. Please notify +Matthew Michels (APD) and +Rob Bassett (APD) if these variables ($mergeX, $mergeY) need to be modified.

$CHIPROOT/designers/matthew/vddm_power.tcl

# hm_pss, pcie_ss_pcie_0, & pss_subsys_nokmercury blocks use the below command for adding power grid

ag_add_power_grid

# Write out the floorplan DEF

ag_def_out_route $DST_DATA_DIR ""; # all nets written

exec mv ../../../source/${DESIGN}.def.gz ../../../source/${DESIGN}.def.bak.gz

exec rsync -a $DST_DATA_DIR/${DESIGN}.def.gz ../../../source/${DESIGN}.def.gz

# Proceed to PREP once the above steps are completed successfully

Changes to made to below files

invs_config.tcl

set LVT_DONT_USE_LIST {\

E[12345]E.*$ \

E[12345]U.*$ \

}

from

set LVT_DONT_USE_LIST {\

E[12345]E.*$ \

}

set POWER_RATIO 0.8

set FLOPS_mbit [list \

E3LLRA_BSDFFCW2X2 \

E3LLRA_BSDFFCW2X4 \

E3LLRA_BSDFFCW4X2 \

E3LLRA_BSDFFCW4X4 \

E3LLRA_BSDFFRW2X2 \

E3LLRA_BSDFFRW2X4 \

E3LLRA_BSDFFRW4X2 \

E3LLRA_BSDFFRW4X4 \

E3LLRA_BSDFFSW2X2 \

E3LLRA_BSDFFSW4X2 \

E3LLRA_BSDFFSW4X4 \

E3LLRA_BSDFFW2X2 \

E3LLRA_BSDFFW2X4 \

E3LLRA_BSDFFW4X2 \

E3LLRA_BSDFFW4X4 \

E3LNRA_BSDFFCW2X2 \

E3LNRA_BSDFFCW2X4 \

E3LNRA_BSDFFCW4X2 \

E3LNRA_BSDFFCW4X4 \

E3LNRA_BSDFFRW2X2 \

E3LNRA_BSDFFRW2X4 \

E3LNRA_BSDFFRW4X2 \

E3LNRA_BSDFFRW4X4 \

E3LNRA_BSDFFSW2X2 \

E3LNRA_BSDFFSW4X2 \

E3LNRA_BSDFFSW4X4 \

E3LNRA_BSDFFW2X2 \

E3LNRA_BSDFFW2X4 \

E3LNRA_BSDFFW4X2 \

E3LNRA_BSDFFW4X4 \

E4LLRA_BSDFFRW4VPX2 \

E4LLRA_BSDFFSW4VPX2 \

E4LLRA_BSDFFW4VPX2 \

E4LNRA_BSDFFRW4VPX2 \

E4LNRA_BSDFFSW4VPX2 \

E4LNRA_BSDFFW4VPX2 \

]

invs_settings.sh

change as per block requirement

import_extra_constraints.tcl

set_interactive_constraint_modes [all_constraint_modes ]

if {[regexp "100|200" $flow_step]} {

set_clock_gating_check -setup 0.2 [filter_collection [all_registers ] "is_integrated_clock_gating_cell == true"]

set_clock_latency -0.1 [get_pins {*/CKA */CKB}]

set_path_adjust_group -from [get_pins {*/CKA */CKB}] -name mem_clk_grp

set_path_adjust -0.025 -path_adjust_group mem_clk_grp -view [all_setup_analysis_views ]

}

set_interactive_constraint_modes {}

place.tcl

### Optimize design

### - new optimization for pre cts

set_interactive_constraint_modes [all_constraint_modes ]

set_clock_gating_check -setup 0.2 [filter_collection [all_registers ] "is_integrated_clock_gating_cell == true"]

set_clock_latency -0.1 [get_pins {*/CKA */CKB */CK}]

set_interactive_constraint_modes {}

postroute_finishing.tcl

#### ----------------------------------------------------------------------

#### Begin output task

#### ----------------------------------------------------------------------

# mercury INFO:

# As a workaround, please run the following commands for DEF MASK issue on M4, M6:

Puts " mercury INFO: START - running dbSet commands to remove MASK 1 on M4 & M6"

dbSet [dbGet top.physNets.swires.layer.name M4 -p2].mask 0

dbSet [dbGet top.physNets.swires.layer.name M6 -p2].mask 0

Puts " mercury INFO: END - running dbSet commands to remove MASK 1 on M4 & M6"

AVO tweaker_timing_eco

After dmsa_sta, run the "tweaker_timing_eco" target to run ECO using tweaker

By default, all VT types are open for timing and power ECO. The VT type is controlled using the below 3 variables in avo_config.tcl

set TVAR(twkr,avaiVTcell) " E*ENRA* E*UNRA* E*ULRA* E*LNRA* E*LLRA* E*SNRA* "

set TVAR(twkr,FASTtoSLOWmap) " @ENRA@ @UNRA@ @ULRA@ @LNRA@ @LLRA@ @SNRA@ : @UNRA@ @ULRA@ @LNRA@ @LLRA@ @SNRA@ : @ULRA@ @LNRA@ @LLRA@ @SNRA@ : @LNRA@ @LLRA@ @SNRA@ : @LLRA@ @SNRA@ : @SNRA@

set TVAR(twkr,SLOWtoFASTmap) " @SNRA@ @LLRA@ @LNRA@ @ULRA@ @UNRA@ @ENRA@ : @LLRA@ @LNRA@ @ULRA@ @UNRA@ @ENRA@ : @LNRA@ @ULRA@ @UNRA@ @ENRA@ : @ULRA@ @UNRA@ @ENRA@ : @UNRA@ @ENRA@ : @ENRA@ "

We have to disable EN and SN cells from the above 3 variables, as given in the below example :

set TVAR(twkr,avaiVTcell) " E*UNRA* E*ULRA* E*LNRA* E*LLRA* "

set TVAR(twkr,FASTtoSLOWmap) " @UNRA@ @ULRA@ @LNRA@ @LLRA@ : @UNRA@ @ULRA@ @LNRA@ @LLRA@ : @ULRA@ @LNRA@ @LLRA@ : @LNRA@ @LLRA@ : @LLRA@ "

set TVAR(twkr,SLOWtoFASTmap) " @LLRA@ @LNRA@ @ULRA@ @UNRA@ : @LLRA@ @LNRA@ @ULRA@ @UNRA@ : @LNRA@ @ULRA@ @UNRA@ : @ULRA@ @UNRA@ : @UNRA@ "

To avoid X1/X2 buffers during tweaker hold fixing, change the below settings in avo_config.tcl

set TVAR(twkr,slk_cell_mapping_rule_regexp_hld_sizing) { @X[3-9]+ @X[3-9]+ : @DLY[0-9]+@ @DLY[0-9]+@ : @BUFX[3-9]+ @DLY[0-9]+X[0-9]+ }

set TVAR(twkr,delayBuf) "E1LLRA_BUFX4 E2LLRA_BUFX4 E1LLRA_BUFX8 E2LLRA_BUFX8 E1LLRA_BUFX16 E2LLRA_BUFX16 E1LLRA_BUFX20 E2LLRA_BUFX20 E1LNRA_DLY025X2 E1LNRA_DLY025X4 E1LNRA_DLY050X4 E2LNRA_DLY025X2 E2LNRA_DLY025X4 E2LNRA_DLY025X8 E2LNRA_DLY050X2 E2LNRA_DLY050X8 E1LLRA_DLY025X2 E1LLRA_DLY025X4 E1LLRA_DLY050X4 E2LLRA_DLY025X2 E2LLRA_DLY025X4 E2LLRA_DLY025X8 E2LLRA_DLY050X2 E2LLRA_DLY050X8"

Also, exclude IO paths by setting the below variable to true :

set TVAR(twkr,excludeIO) true

set TVAR(twkr,exclude_io_cells) true

Disable split_load during setup fix, by using the below variable :

set TVAR(twkr_eco,enable_tproc_twkr_fix_setup_split_load) false (avo/fscripts/twkr_timing_config.tcl)

####### To make the tweaker use ecoAddRepeater command in the eco file rather than trying to use the atomic buffer insertion #########

set tkr_eco_fix_trans 1

set tkr_eco_fix_cap 1

OUTPUT :

summary :

avo/timing/tweaker_timing_eco/rpts/postEcoGlobalTimingReport.rpt.gz

TOP 1000 violating setup and hold violating start and end pairs :

avo/timing/tweaker_timing_eco/rpts/timing_endpoint_summary.max.rpt.gz

avo/timing/tweaker_timing_eco/rpts/timing_endpoint_summary.min.rpt.gz

INDIVIDUAL CORNER RPT :

avo/timing/tweaker_timing_eco/rpts/dump_rpt/*

ECO FILES :

INVS ECO : avo/timing/tweaker_timing_eco/data/invs.tcl.<block name>

PT ECO : avo/timing/tweaker_timing_eco/data/pt.tcl.<block name>

AVO tweaker_power_eco

After implementing 1 round of tweaker_timing_eco, run "tweaker_power_eco" target for leakage recovery.

Before running this step, make sure EN and SN cells are disabled using the 3 variables discussed previously ( refer tweaker_timing_eco section )

set TVAR(twkr,avaiVTcell) " E*UNRA* E*ULRA* E*LNRA* E*LLRA* "

set TVAR(twkr,FASTtoSLOWmap) " @UNRA@ @ULRA@ @LNRA@ @LLRA@ : @UNRA@ @ULRA@ @LNRA@ @LLRA@ : @ULRA@ @LNRA@ @LLRA@ : @LNRA@ @LLRA@ : @LLRA@ "

set TVAR(twkr,SLOWtoFASTmap) " @LLRA@ @LNRA@ @ULRA@ @UNRA@ : @LLRA@ @LNRA@ @ULRA@ @UNRA@ : @LNRA@ @ULRA@ @UNRA@ : @ULRA@ @UNRA@ : @UNRA@ "

Bu default, "tweaker_power_eco" runs both leakage recovery and dynamic power optimization.

In :avo/fscripts/avo_config.tcl

To run only leakage recovery, disable dynamic power optimization by setting the below variable to 0

set tkr_eco_enable_dynamic_power_opt 0

Also, make sure the below variable is 1 for enabling leakage recovery ( By default, this variable is 1 )

set tkr_eco_enable_leakage_power_opt 1

By default, the flow does VT swap, cell downsizing and area recovery as part of leakage recovery.

To avoid timing degradation, we have to disable cell downsizing and area recovery , and only enable VT swap.

For this change, we need to comment the below highlighted lines in "gscripts/tweaker/fix_power.tcl" ( Use a local copy of gscripts since there is no write permission )

############################## Leakage Power ECO ####################

if { $tkr_eco_enable_leakage_power_opt } {

echo "METRIC: Start tproc_twkr_leakage_power_vt_swap at [date]"

tproc_twkr_leakage_power_vt_swap

echo "METRIC: Stop tproc_twkr_leakage_power_vt_swap at [date]"

dump_runtime

# echo "METRIC: Start tproc_twkr_leakage_power_sizing_down at [date]"

# tproc_twkr_leakage_power_sizing_down

# echo "METRIC: Stop tproc_twkr_leakage_power_sizing_down at [date]"

# dump_runtime

# echo "METRIC: Start tproc_twkr_leakage_power_area_recovery at [date]"

# tproc_twkr_leakage_power_area_recovery

# echo "METRIC: Stop tproc_twkr_leakage_power_area_recovery at [date]"

# dump_runtime

} else {

echo "INFO: Not optimizing leakage power. (tkr_eco_enable_leakage_power_opt=0)"

}

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