• Synchronous Process handles all the matters regarding clocking and other controls associated with the storage element
• Combinatorial Process handles all the matters associated with the Next State Decoder and the Output Decoder
• inputs labelled Parallel Inputs are used to signify inputs that act in parallel on each of the storage elements
• inputs labelled State Transition Inputs include external inputs that control the state transitions.
• Present State signals are used by the Combinatorial Process box for both next state decoding and output decoding

VHDL Behavioral Representation of FSMs

• Starting FSM problems with the drawing of a black box diagram is a healthy approach particularly when dealing with FSMs
• There are internal numerical representations for listed state types, but we only deal with the more expressive symbolic equivalent
• Mealy-Type FSMs depend on both state and input
• Mealy type solutions treat the output as a Moore-type output in the first two when clauses of the case statement

8.2 One-Hot Encoding for FSMs

• uses one bit in the state register for each state of the FSM.
• For a one-hot encoding FSM with 16 states, 16 flip flops are required. However only four flip flops are required if the same FSM is implemented using a binary encoding.
• the closed form equation describing the number of flip-flops required for a given FSM as a function of the number of states is

#(flip flops) = ⌈log₂(#states)⌉

• In One-Hot Encoding, the number of flip-flops required to implement a FSM is therefore equal to the number of states in the FSM. The closed form of this relationship is

#(flip flops) = #(states)