VHDL Invariants

Case Sensitivity

• not case sensitive

White Space

• not sensitive to white space (space and tabs)

Comments

• comments begin with the symbol "--" (two consecutive dashes)

Parentheses

• relatively lax on use of parentheses

VHDL Statements

• every statement terminates with a semicolon

if, case and loop Statements

• if statements
  • has a corresponding then component
  • terminated with an end if;
  • "else if" construct is elsif
• each case statement ends with an end case;
• each loop statement ends with an end loop;

Identifiers

• variable names, signal names, and port names
• self-describing
• no character limit
• may contain letters, numbers and underscore
• must start with an alphabetic character
• cannot end with an underscore and can't have two consecutive underscores

Reserved Words

• special words unable to be used as identifiers
• AND, OR, XOR, etc.