State Reduction

State reduction is concerned with procedure for reducing the number of states in a state table while keeping the external input/output requirements unchanged. The objective of which is to reduce the number of flip-flops in a sequential circuit.

Consider the State Diagram Below for State Reduction.

From the State Diagram , we can derive the State Table as Follows'

EXERCISE:

Get the Reduced State for the following State Diagram and STate Table.

Below is the Equivalent Reduced State.

EXAMPLE :  Design a  MEALY MACHINE Sequence Detector  for 0101 or 1001.

Input is X which is a series of 1's and 0's.  Output Z will give a 1 whenever the sequence 

0101 or 1001 is detected.

USING A brute force solution:

Reset state A, checks 3 consequent bits of every possible combinations.

After 4th bit coming-in, give output and reset to state A.

This is shown by the STATE DIAGRAM below.