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11) Derived the Excitation Equations, Next State Equations, State Table and State Diagram for the  Sequential Circuit below.

12) Derived the Excitation Equations, Next State Equations, State Table and State Diagram for the  Sequential Circuit below.

13) Derived the Excitation Equations, Next State Equations, State Table and State Diagram for the  Sequential Circuit below.

14) Derived the Sequential Logic Circuit of the State Diagram for a Sequence Detector.

16) Given the State Table Below, Derive the Sequential Logic Circuit using D Flip flops.

If you wish to RESET your output at STATE 111 at any point of time, what do you need to add in your Sequential Circuit. Include this capability in your Implemetation.

17) The above circuit is actually a sequential circuit used for communication protocols that requires a SIGNAL with a Sequence of 00000001 which is the Primary output Z of the Sequential Circuit implementing the State Table Above.  The Primary Input E is used to indicate at the end of the sequence or during the last output in the sequence if the sequence will repeat (E=1) or the output will remain the same at constant 1 (E=0).

This Time implement another Sequential Circuit for a Communication System that will produce the required Protocol SIGNAL that will indicate the START of the Message with the SEQUENCE

 01111110.

Show the STATE TABLE and LOGIC CIRCUIT.

18) Using the State Diagram Below, Derive the STATE TABLE and Draw the Sequential Logic CIrcuit. One Primary Input X and 2 Primary outputs Z and S. Implement using D Flip flops.

TIP:

Use X as your input (message) and Z as your output. A will determine the Present and Next State. Input A is the NRZI message variation  and Z output will detect if your Input X and 

Present State A are not equal or complements with one another.  

Create the STATE TABLE, STATE DIAGRAM and LOGIC CIRCUIT 

using D Flip FLop (You need only 1 D Flip flop).

20)  Design a BCD DECADE Counter  (0000 to 1001) using JK Flip Flops. Show  Control and Excitation Equations, State Table and Logic Diagram.