Introduction to Nanoelectronics

Course Code : ECE517 (Received Teaching Excellence Award twice for this course offered in Winter-2017 and Winter-2018)

Credits : 4

Course website : https://www.usebackpack.com/iiitd/w2017/ece5ine/info

Overview

Nanoelectronics is an interdisciplinary area of research which has a huge potential and is currently attracting a great deal of attention. The objective of this course is to understand the basic principles that govern the operation and electrical characteristics of nanoelectronic devices and become familiar with the recent research being undertaken in nanoelectronics.

Description

Expected Outcome:

At the end of the course the student:

• • Clearly explains distinct phenomena that are important in nanoelectronic devices.

  • Is able to describe the operating principles, merits, demerits and challenges of some of the futuristic nanoelectronic devices.

  • Is able to compute a given parameter or physical quantity for a nanoelectronic device by applying appropriate equations or formula.

  • Is able to describe the challenges of scaling of conventional MOSFETs and possible solutions.

Course Content (Week-wise schedule):

1. Overview of Nanoelectronics: significance, "bottom-up" approach to build devices, trends and ITRS perspective

2. Quantum Mechanics: Wave Properties of Particle, Basic Postulates, Wave Function, Schrodinger’s equation, Expectation Value, Particle in a Box, Finite Potential Well, Tunnel Effect

3. Semiconductor Physics: Crystal Structure, Energy Bands, Density of States, Distribution Functions, Fermi Level, Quantum Well, Quantum Wire, Quantum Dot

4. Carrier Transport: Semi-classical Transport, Transport in Confined Materials, Ballistic Transport

5. MOSFETs: Operation, Short Channel Effects, Limits on Subthreshold Swing and its consequences, Challenges in Scaling

6. Highly Scaled MOSFETs: High-k dielectric, Strain, FDSOI MOSFET, FinFETs, III-V Materials

7. 2-D Materials: Graphene, Transition Metal Dichalcogenide (TMD)

8. 1-D Materials: CNT, Nanowires

9. CNT, Graphene Nanoribbon and Nanowire based FETs

10. Steep Subthreshold Slope Devices: Tunnel FET, NCFET, IMOS

11. Nanoelectromechanical Switches (NEMS)

12. Novel Devices: Single Electron Transistors, Molecular Devices

13. Summing Up and Presentation

Evaluation

• Quizzes - 20%

• Mid-sem - 30%

• End-sem - 45%

• Online tool based assignment - 5%

Pre-requisites (Mandatory)

• Basic understanding of P-N junction and MOSFET

Pre-requisites (Desirable)

• Fundamentals of Solid-State Devices

Textbooks

There is no prescribed textbook for this course. At the end of each lecture, appropriate references will be given.

Some references which will be helpful in the course are:

• • Feynman, Leighton, Sands, “The Feynman Lectures on Physics”, Vol. 3

  • David J. Griffiths, “Introduction to Quantum Mechanics”

  • Arthur Beiser, "Concepts of Modern Physics"

  • S. M. Sze, "Physics of Semiconductor Devices", John Wiley and Sons,

  • D. A. Neaman, "Semiconductor Physics and Devices"

  • International Technology Roadmap for Semiconductors (ITRS), "Emerging research devices", 2013 edition." http://www.itrs.net, 2013.

  • S. Datta, "Quantum Transport: Atom to Transistor", Cambridge University Press, 2nd ed., 2005"

  • M. Lundstrom, J. Guo: Nanoscale Transistors

  • M.S. Dresselhaus, G. Dresselhaus, Ph. Avouris, "Carbon Nanotubes"

  • R. Murali, "Graphene Nanoelectronics: From Materials to Circuits"

  • Resources at Nanohub (https://nanohub.org/)

  • Research Papers (Pointers will be given in the class)

Policies

1. Late Assignment Submission Policy

Each day of delay will attract 20 % penalty and after 5 days delay no more submission

Illustration: Day of submission is 20th August

Submission is on-time if it is done by 12:00 midnight of 20th August

Submitted at 8:00 am 21th August: Penalty of 20%, If marks obtained was 20, it will change to 16 marks

Submitted at 1:00 am 25th August: Penalty of 100%, If marks obtained was 20, it will change to 0 marks

2. Academic dishonesty/plagiarism/cheating policy

IIITD rules will apply.

Academic dishonesty policies of IIIT Delhi apply. https://www.iiitd.ac.in/sites/default/files/docs/education/AcademicDishonesty.pdf