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Sneh Saurabh
Home
VDF Book
About Me
Awards/Honors
Research
Interests
Nanoscale Devices and Circuits Lab (NDCL)
Patents
Publications
Team
Service
Administrative Responsibilities
For Research Community
Outreach Activities
Teaching
Digital Circuits
VLSI Design Flow
Introduction to Nanoelectronics
NPTEL (VLSI Design Flow: RTL to GDS)
Solid State Devices
Advanced Digital Design and Verification
Advanced Solid-State Devices
Sneh Saurabh
Home
VDF Book
About Me
Awards/Honors
Research
Interests
Nanoscale Devices and Circuits Lab (NDCL)
Patents
Publications
Team
Service
Administrative Responsibilities
For Research Community
Outreach Activities
Teaching
Digital Circuits
VLSI Design Flow
Introduction to Nanoelectronics
NPTEL (VLSI Design Flow: RTL to GDS)
Solid State Devices
Advanced Digital Design and Verification
Advanced Solid-State Devices
More
Home
VDF Book
About Me
Awards/Honors
Research
Interests
Nanoscale Devices and Circuits Lab (NDCL)
Patents
Publications
Team
Service
Administrative Responsibilities
For Research Community
Outreach Activities
Teaching
Digital Circuits
VLSI Design Flow
Introduction to Nanoelectronics
NPTEL (VLSI Design Flow: RTL to GDS)
Solid State Devices
Advanced Digital Design and Verification
Advanced Solid-State Devices
Advanced Solid-State Devices
Course R
an
in Winter 2025
(Received Teaching Excellence Award)
Details:
Click
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