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Recent Developments

• The paper titled "LiMo: A Framework Leveraging Machine Learning for Multi-Input Switching Timing Models of Complex Logic Gates" published in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS1) (June 2025)

• The paper titled "Fault-Tolerant Design Framework for Probabilistic-Bit (P-Bit) Systems: Proposal and Analysis" published in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS1) (May 2025)

• Rithu Sagar M and Yashwardhan Tyagi joined the research group as PhD students (Dec 2024)

• The course "VLSI Design Flow: RTL to GDS" concluded on the NPTEL platform. It had more than 12000 participants (Nov 2024)

• Received the "Outstanding Educator Award 2024"  (Oct 2024)

• The paper titled "Impact of Non-Idealities on the Behavior of Probabilistic Computing: Theoretical Investigation and Analysis" published in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS1) (Sept 2024)

• Abhinav Gupta defended his PhD thesis titled "Implementation of Neuromorphic Computing Framework using Tunneling-based Devices" (April 2024)

• The paper titled "Unsupervised Learning in a Ternary SNN Using STDP" published in IEEE Journal of Electron Devices Society  (Feb. 2024)

• The paper titled "Bilayer Synthetic Antiferromagnetic Skyrmion-based Muller C-element" published in IEEE Transactions in Electron Devices (Jan 2024)

• Varun has joined as a PhD student (Jan 2024) [will work jointly with Dr. R.K. Ghosh]