Home

Recent Developments

• Paper titled "Modeling Glitches due to Multiple Input Switching using Machine Learning", Accepted in ACM Transactions on Design Automation of Electronic Systems (March 2026) 

• Two papers from our group accepted in International VLSI Symposium on Technology, Systems and Applications, Hsinchu, Taiwan (February 2026)

• Paper titled "Machine Learning-Driven Flip-Flop Timing Model and its Application in Resolving Marginal Timing Violations", accepted in ACM Transactions on Design Automation of Electronic Systems (Dec 2025) 

• The course "VLSI Design Flow: RTL to GDS" concluded on the NPTEL platform for the third time. It had more than 17000 participants (Nov 2025)

• Amina defended her PhD thesis titled "Investigating Probabilistic Computing: Devices, Circuits, and Systems" (September 2025)

• The paper titled "Skyrmion-based synaptic element with strain-mediated plasticity", published in Neuromorphic Computing and Engineering  (August 2025)

• Two papers presented by our group at VDAT-2025, Chandigarh (August 2025)

• Nitin and Garima  joined our research group as PhD students (July 2025)

• The paper titled "LiMo: A Framework Leveraging Machine Learning for Multi-Input Switching Timing Models of Complex Logic Gates" published in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS1) (June 2025)

• The paper titled "Fault-Tolerant Design Framework for Probabilistic-Bit (P-Bit) Systems: Proposal and Analysis" published in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS1) (May 2025)