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• Jul 2026: Paper titled "Hitch: Leveraging Machine Learning for Hold Violation Waiver Through Internal Glitch Height Estimation” won the Best Poster Award at the  IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2026, Kolkata.  

• Apr 2026: Paper titled "HAWK: Machine Learning-Driven Waiver of Marginal Hold-Time Violations with Process-Variation Awareness” won the Best Paper Award at the International VLSI Symposium on Technology, Systems and Applications (VLSI TSA) 2026, Hsinchu, Taiwan.  

• Mar 2026: The project "Reimagining Standard Cell Libraries: From Static Data to Self-Learning Design Intelligence" selected for funding under the Advanced Research Grant (ARG), ANRF

• Mar 2026: Paper titled "Modeling Glitches due to Multiple Input Switching using Machine Learning", Accepted in ACM Transactions on Design Automation of Electronic Systems

• Dec 2025: Paper titled "Machine Learning-Driven Flip-Flop Timing Model and its Application in Resolving Marginal Timing Violations", accepted in ACM Transactions on Design Automation of Electronic Systems

• Nov 2025: The course "VLSI Design Flow: RTL to GDS" concluded on the NPTEL platform for the third time. It had more than 17000 participants

• Sep 2025: Amina defended her PhD thesis titled "Investigating Probabilistic Computing: Devices, Circuits, and Systems"

• Aug 2025: The paper titled "Skyrmion-based synaptic element with strain-mediated plasticity", published in Neuromorphic Computing and Engineering

• Jun 2025: The paper titled "LiMo: A Framework Leveraging Machine Learning for Multi-Input Switching Timing Models of Complex Logic Gates" published in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS1)