Engineering Resume

SKILL SET:

Primary Technical Skills

• Domain/Technology: LTE(TD-LTE) and WiMAX System Architecture & FPGA Design, Transmission(STM-1/4, Access System, MSPP) / Core Network System(TDM,ATM,IP) / Router & Voice G/W(Trucking & Access G/W) / DSLAM, Military System(Wired & Wireless N/W System, Voice Switch System) also System Architecture & FPGA Design
• Language:VHDL, Verilog, C
• Scripting:TCL, Perl
• Tools: Modelsim, Xilinx-ISE, Xilinx-Vivado, Synplify Pro, Altera-quartusII, Matlab, Signal-Explorer(SI Tool), ORCAD & Mentor Schematics
• Testing & Verification Tool: Chipscope, Signal Tap
• OS: Linux(Redhat, Ubuntu, openSUSE), Solaris, Windows, Mac OS.
• Others: Six-Sigma Green Belt Certified for Hardware Design.

Work Experience:

WORK EXPERIENCE -1 (Samsung):

• Job Title: Transmission System, Hardware and FPGA design
• Job: FPGA Design Engineer
• Project AceMAP-ATM/TDM/IP Single platform 1998.01 – 1999.12
• Project the Spider Network -Military System 1990.01 – 1997.12

· I was responsible for designing the Access Network system structure that integrated ADSL / VDSL / HDSL / ISDN.

· I mainly developed FPGA, CPU board and embedded hardware.

· I developed embedded hardware of military communication system.

· I conducted standard tests, documentation and integration testing of military communication.

• Tool: Synopsys DC-Compiler, Active-CAD/Active-HDL, MAXPLUS1, MAXPUS2, Design Compiler, Leonardo Spectrum
• Platform: Xilinx Foundation, Altera MAX Series
• Role & Contribution:

· Schematic & RTL coding (Cell Bus I/F & AAL5 and AAL2 SAR, TDM Switch & PLL, STM-1/4 SDH Transmitter & MSPP).

· Schematic & RTL coding ().

· Unit & system verification (Cell Bus & ATM SAR).

· Synthesis & Implementation.

· Test program coding (Motorola CPU Series).

· Functional verification of various blocks using Test Bench.

· Timing analysis and real time validation in the boards.

• Key Achievements:

· VoIP, VoATM, TDM System & DSLAM & Transmission equipment (STM-1/4, MSPP) System Architecture Design and Hardware Board Design.

· EPLD/FPGA using the first version (Year-1992) of Altera.

· Schematic & RTL coding ().

· Unit & system verification (Switching &, Clock & Protocol Card).

· ATE Unit Design (GPIB & Relay Matrix Controller).

· Test program coding (Intel CPU Series).

WORK EXPERIENCE -2 (Sunrisetelecom):

• Job Title: Transmission measuring System FPGA design
• Job: FPGA Senior Design Engineer
• Project SONET, SDH Portable Single platform 1999.12 – 2000.04

· I developed an FPGA for rugged handheld field test equipment that measures SDH/SONET and PDH /DSn.

• Tool: Synopsys DC-Compiler
• Platform: Xilinx Foundation
• Role & Contribution:

· Schematic & RTL coding (STM-1/4 SDH Transmitter).

· Unit & system verification (Sonet, SDH Mapper).

· Synthesis & Implementation.

· Test program coding (Motorola CPU Series).

· Functional verification of various blocks using Test Bench.

· Timing analysis and real time validation in the boards.

• Key Achievements:

· Transmission a measuring instrument (STM-1,4).

WORK EXPERIENCE -3 (Samsung):

• Job Title: LTE/TD-LTE/WiMAX2 RRH FPGA design
• Job: FPGA Senior Design Engineer
• Project TD-LTE RRH & WiMAX 2008.04 – 2011.04
• Project WiMAX System 2002.04 – 2008.03
• Project Next Generation Network solution 2000.04 – 2002.03

· WiMAX2(16m) RRH FPGA(Virtex-XC5VLX85) Development of the world's first

· Concurrent services of WiMAX and TD-LTE RRH FPGA Development of the world's first.

· WiBro(WiMAX) ACR/DU/RU FPGA Development of the world's first

· I designed the system structure of NGN system which can integrate voice, data, and all sorts of media such as video.

· I mainly developed FPGA and embedded hardware.

• Tool: ISE 9.1~11.4, EDK9.2, Synplify 9.62~2010.06, Signal Explorer
• Platform: Virtex5 (110T,85T), Virtex2pro
• Role & Contribution:

· RTL level VHDL cording of Optic Base CPRI, WiMAX & TD-LTE Mapper, DPD&DUC&DDC formatter, Ethernet I/F, Soft-IP Base CPU(MicroBlaze & PicoBlaze), CPRI&WIMAX&TD-LTE of Clock Adaptation, WIMAX&TD-LTE of TDD Control.

· RTL level VHDL coding of TDM & ATM I/F (AAL5, AAL2, AAL1), Cell Switch Control.

· Vocoder Card Design (VoIP DSP, VoIP facility Card).

· Unit & system verification (VoIP, TDM & ATM Switch).

· I2C Base Device I/F (DAC, ADC, Optic Module, System-PLL, RF-PLL Devices).

· GPIO Base Device I/F (DSP, DUC, DDC).

· Unit & system verification (Modem & Transceiver integration).

· Synthesis & Implementation.

· Test program C-language coding (MicroBlaze & PPC).

· RET Interface & Protocol (AISG2.0) Processing.

· Functional verification of various blocks using Test Bench.

· On-chip verification using Chipscope.

· Timing analysis and real time validation in the boards.

• Key Achievements:

· WiMAX2 RRH FPGA & Digital Block of the world's first VHDL and Schematic Design.

· WiMAX RRH FPGA & Digital Block of the world's first VHDL and Schematic Design.

WORK EXPERIENCE -4 (Sunwave)

• Job Title: Smart SFP FPGA design
• Job: FPGA Senior Design Engineer
• Project Antenna Tilt, Fall Prevention System (Medical), LTE Small Cell 2014.07 – 2016.04

· Antenna Tilt: AISG2.0 Software Coding & FPGA VHDL Coding.

· Fall Prevention System: Sensor, Bluetooth Control Software & FPGA (Spartan3-LX9) Coding.

· Smart-SFP: Optic Link Monitoring & Remote Control S/W,H/W,FPGA Design

• Tool: ISE 11.4, EDK11.4, SDK11.4, Vivado2014.1, SDK2014.1
• Platform: Spartan3 (Spartan3-LX9), Artix7 (XC7A35T)
• Role & Contribution:

· RTL level VHDL cording of Optic Base CPRI, Ethernet I/F, Soft-IP Base CPU (MicroBlaze), CPRI&WIMAX&TD-LTE of Clock Adaptation, I2C Base Device I/F (Optic Module, System-PLL, Sensor Devices).

· Using Embedded IP (XADC, MIG7-DDR3, GTP, MMCM, BRAM, PLL, DSP).

· Synthesis & Implementation.

· Test program C-language coding (MicroBlaze).

· RET Interface & Protocol (AISG2.0) Processing.

· Functional verification of various blocks using Test Bench.

· On-chip verification using Chipscope.

· Timing analysis and real time validation in the boards.

WORK EXPERIENCE -5 (Rayence-USA)

• Job Title: Hardware and Embedded Engineer.
• Job: System Engineer
• Project Medical digital radiography products and IT Solution 2017.07 – Now
• Tool: Embedded-Linux OS
• Role & Contribution:

· Maintain and repair Flat Panel Detectors, Evaluate and troubleshoot different Flat Pane Detectors

· RMA and analyze statistics and compile accurate reports and share with management team.

· Engage with clients on technical integration details, support requests, etc.