[❤]Tool Skill

imap <buffer> <M-i> <Esc>owhen

iabbr dw downto

iabbr si signal

iabbr gen generate

iabbr ot (others => '0');

iabbr st std_logic;

iabbr sv std_logic_vector(downto 0); <ESC>11ha

iabbr com component COMP_NAME port (<CR> <CR> <Esc>0i);end component;

iabbr pm u_COMP_NAME : COMP_NAME port map (<CR> <CR> <Esc>0i);

iabbr ps process (RST, CLK)<CR>begin<CR>if RST = '0' then<CR>elsif CLK = '1' and CLK'event then<CR>end if;<CR>end process;<Esc>?)<CR>i

iabbr ca case is<CR>when STATE1 => ACTION1<CR>when STATE2 => ACTION2<CR>when others => null;<CR>end case;<Esc>4k$2hi

iabbr en <Esc>bdwientity <Esc>pa is<CR>end entity ;<Esc>POport (<CR>);<Esc>O

iabbr ar <Esc>b"zdwiarchitecture <Esc>pa of <Esc>mz?entity<CR>wyw`zpa is<CR>begin<CR>end architecture ;<Esc>"zPO

iabbr li library ieee;<CR>use ieee.std_logic_1164.all;<CR>use ieee.numeric_std.all;<CR>use ieee.std_logic_signed.all;<CR>use ieee.std_logic_unsigned.all;<CR>use ieee.std_logic_arith.all;<CR> <Esc>bo<Esc>o<Esc>o