Even though tamper-resistant designs or shielding structures are applied to the cryptographic IC, processing information inside the IC may leak from interconnections in the printed circuit board (PCB) of cryptographic devices in the form of EM field. Security must be considered not only chip-level but also interconnection-level. However, the number of previous works focusing on EM radiation from packages and interconnections containing secret information is limited. We develop an efficient and accurate EM information leakage estimation method, which can be applied to not only cryptographic IC evaluation but also PCB and interconnections supporting the cryptographic IC. We strongly believe that "HARDWARE IS A ROOT OF TRUST". EMC and packaging background provides a promising solution towards recent hardware security issues.
EM radiation from not only chip but also from interconnections such as PCBs and cables are causing security issues. Also, EMI can be intentionally induced to cryptographic and information devices related to security (IEMI attack). It is important to estimate possible weak points leaking the information or vulnerable to the IEMI attack. We design the security evaluation board with FGPA and applied the proposed EM information leakage analysis method. Based on the result, we are developing secured design methodologies. This kind of knowledge can be applied to various cases. For example, we realized a true random number generator (TRNG) with ring-oscillators (RO), induced IEMI to the PCB PDN, observed jitter reduction (source of the randomness), and developing countermeasure methods (under development). Our hardware security researches are not limited to cryptographic devices but also information devices leaking video and audio signals.