Lab 5
Prelab
Inverter schematic.
Inverter symbol.
Inverter layout and DRC pass.
Inverter extracted view with LVS pass.
inverter circuit simulated with graph.
Simulation using extracted layout.
Labwork
See prelab for details of inverter with dimensions of 12u/6u with 6000n width.
Inverter schematic with 48u/24u dimensions, using a multiplier of 4.
Symbol view for above 48u/24u inverter.
Layout view of the 48u/24u inverter, also notice an error free DRC pass.
Extracted view of the 48u/24u inverter, completed LVS with matching net lists.
Simulations
Simulation of 12u/6u inverter schematic with 100f F capacitor.
Simulation of 12u/6u inverter schematic with 1p F capacitor.
Simulation of 12u/6u inverter schematic with 10p F capacitor.
Simulation of 12u/6u inverter schematic with 100p F capacitor.
Simulation of 48u/24u inverter schematic with 100f F capacitor.
Simulation of 48u/24u inverter schematic with 1p F capacitor.
Simulation of 48u/24u inverter schematic with 10p F capacitor.
Simulation of 48u/24u inverter schematic with 100p F capacitor.