Oscillator amplitude stabilization

Feb/23  2016

to use a oscillator as sweep signal source, the amplitude stabilization is the most important goal.  what's a single free run oscillator range to keep output amplitude stable is an interesting factor of a oscillator.

A oscillator testing bed

every electronic project need a cabinet, otherwise, it will be drop to a conner finally throw away as garbage. 

LC oscillator from END

EDN introduce a amplitude stabled oscillator:

http://www.edn.com/design/analog/4323726/LC-oscillator-has-stable-amplitude

it says "even at frequencies as low as 5 kHz and as high as 50 MHz with no adjustment of any passive-component value".

I built this oscillator on the test bed.  i use the 2n5485, but with relatively long lead of component,  the amplitude keep stable up to around 36 Mhz, on even higher frequency the output level dropped. there is a up limit: beyond that, no way to keep amplitude stable. and below ~15Mhz the output waveform severely distortion-ed.


Negtive device candidate oscillators

to keep the amplitude stable, the oscillator must have more than enough gain, and built in stabilize mechanism.  any 2 active component oscillator became candidate. but based on previous experiment,  built in limit for free run oscillator can not hold the oscillation amplitude too much.  there is several oscillator could keep the amplitude stable from 300Khz to 40Mhz. but the gain limit the oscillator output to this level at higher frequency.

following one is a very popular oscillator in most of HF sweep signal source or HF antenna analyzer. but for free run performance, it's performance is not as good as the above 2 oscillators. 

keep amplitude in a more wide frequency range need introduce some extra limit feedback. 

 

2 BJT-JFET(MOS) negative device oscillator by yngz (at crystalradio.cn )

(tend to be a super regenerative receiver..)

adding extra amplitude control to oscillator is a way to keep oscillator output constant for more wide range, hope it keep almost constant output amplitude from 400 Khz to more than 50 Mhz.

first interesting oscillator topology is a negative device formed by 9015 and BF998R,  another BF998R introduce a amplitude control loop.

i made this oscillator in a very rude way, extra length component lead and bad topology. and use a very high Ft JFET 2n5486, it's for UHF. i believe all these mess lead to my disaster, there is UHF level parasitic oscillation with in the control loop.  even though yngz suggesting several modify to my version, but unable to eliminate the parasitic oscillation. 

here is another interesting oscillator introduce by yngz ,  the original circuits use the BF998 as active device, but i use 2N5486. 

the 1 Mohm resistor and 0.4uF capacitor connected to the base form a amplifier control circuits.  the oscillation amplitude could reach the 1.2 Vpeak, actually it's the max power supply for the PNP transistor. such a high amplitude, leading to the PNP's CB junction negative bias as a diode, hence, the tank voltage get rectification, the DC voltage of the transistor base raise, reduce its gain. 

bad thing is, this schematic is similar to a super-regen receiver, actually, it does very easily to be a super regen oscillator. see, the picture of the base, showing a typical super-regen saw-tooth waveform. and the quick voltage raise edge cause by the rapidly peak voltage increase on the tank.  and discharge from the 1 Mohm resistor speed is very low. 

to cure this problem, i need change the 1M resistor to 27k for it's working from 3 Mhz to 15 Mhz range.  and 1 Mhz or even low frequency need reduce it to an even smaller value. it's hard to choose a resistor value working on all range from 455 khz to 50 Mhz, and on higher frequency smaller resistor or change the 0.1 uF to small capacitor will reduce the total gain provided by the active device. 

another big problem come from the JFET, the original schematic use the MOS FET.  it's a diode while JFET get positive bias while the tank peak voltage raised. (but, change to a MOS, 2sk241, does not improve it's stability). 


2 other MOS FET Oscillator 

 

This oscillator use a MOS FET, this time i does not replace it with JFET. the left show a reference layout(not every component show up there).

the output from tank is a very good wave form. 

this oscillator easily working on few khz to around 15 Mhz, above 30 Mhz, it won't get start oscillating, because the PNP of 9015 or 2N3906 is not that high Ft transistor.  

the diode must be 1N60 while use this schematic, because there is no resistor connect to the G2 of the BF998R. while 1N60 became reverse bias it works  like a resistor, if you choose 1N4148, please connect the Gate 2 a resistor to VCC, value from 10K to 1 Mohm.

another drawback is this oscillator will show some unstable phenomenon while tune it to other frequency.  connect G2 a smaller resistor, or use a big C style tank will help but in tuning process, it will stop oscillating at somewhere, and became stable again soon.

this topology connect the PNP as common emitter amplifier with big degeneration resistor, limit it as a high frequency oscillator, in it's working range it always give an very good wave form, of cause, checking by my eye.

the original author is yngz, and his mail is:  519865301@qq.com

the 2N3906 could be reconfigured to be a common base amplifier. just connect 2 capacitor. these 2 oscillator could share same layout. 

this one easy start oscillating at 50 Mhz and even more.  

to get a stable AGC, adjust the 1 k and 10 k resistor, and the source gate 1k resistor, make the voltage of 2N3906 base is about half of supply, in my version, the 1K source resistor replaced as 2 K, emitter resistor change to 1.3 k, and 10 K resistor change to 16 K.

it' output level,  from 400khz to 50Mhz is different, but given a LC tank(variable capacitor) it's output almost keep same level in it's tune range.

the extra AGC feed back path's time constraint is critical, or it will affect tuning process, in tuning, the amplitude will change and re-balance, some time it stop oscillating and recover, and the instability tend to occur while the variable capacitor reach it's max value.

reduce AGC capacitor to 100pf will eliminate any stop oscillation problem, but because amplitude control is too strong, low frequency get strong oscillation will lead to the amplitude will change when pass that point, this is equal to a few HZ AM signal.  to cure this problem, won't let the oscillate's output level too small, use 3x4148 serials in the AGC loop will get a very stable oscillator, with a little bit distortion output. 

when use 3X1N4148, or 2X4148,  with 1000pF AGC capacitor, the AGC loop stable enough for me.

NOTES for MOS FET amplitude stable oscillator

in the free run oscillator there better be some kind amplitude control mechanism, or, AGC need control too wide range oscillating amplitude change, will leading to AGC loop unstable.