Embedded Files
Design an 8-bit shift register with change rate 1Hz
Design an 8-bit shift register with change rate 1Hz
A shift register can shift its stored data when the clock signal transitions from low to high (rising edge). It's a useful module for transferring data from one module to another. However, it should be implemented using only non-blocking assignment statements to avoid potential race conditions.
System architecture
System architecture
Recommended Dev File Management
Recommended Dev File Management
RTL Reference
RTL Reference
RTL Reference (An even cleaner coding style)
RTL Reference (An even cleaner coding style)
RTL Structure
RTL Structure
Testbench Reference
Testbench Reference
Simulation Example
Simulation Example
The bit 0 shifts from the AN[0] position to the AN[7] position, then wraps around back to the AN[0] position. This process repeats continuously.
Constraint File Reference
Constraint File Reference
Demonstration
Demonstration
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