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NYCU EELABS
首頁
Course515025 - EELab(1)
Course515405 - EELab(1)
Course515029 - EELab(2)
2025 Spring Final Exam
Course515105 - DLab
DLab final project
Lab Material
LTspice
Software Environment Introduction
O-Point Analysis
Transient Analysis
AC SWEEP Analysis
DC SWEEP Analysis
Add Model
Save Files
Step Command
Transformer Modeling
Multiple Simulation in one schematic
Temperature Simulation
Special Voltage/Current Source
FPGA Development and Xilinx Vivado
Basic skills
Inverter
Half Adder
Full Adder
Dataflow
Arithmetic
2-bit Full Adder
Seven Segment Decoder
Behavior modeling
Seven Segment Decoder (Full 16 combinations)
Counter
Frequency divider
Procedural assignment
Shift Register
Multiplexer
Multiple IPs
counter_digit_display
an_counter_digit_display
switch_digit_display
button_tone
Design ideas
Persistence of vision
Keypad scanning
PWM application
Bouncing
ILA
miscellanies
associated_files
Supplement
Quick links
儀器借用
Sitemap
TAA Section
NYCU EELABS
首頁
Course515025 - EELab(1)
Course515405 - EELab(1)
Course515029 - EELab(2)
2025 Spring Final Exam
Course515105 - DLab
DLab final project
Lab Material
LTspice
Software Environment Introduction
O-Point Analysis
Transient Analysis
AC SWEEP Analysis
DC SWEEP Analysis
Add Model
Save Files
Step Command
Transformer Modeling
Multiple Simulation in one schematic
Temperature Simulation
Special Voltage/Current Source
FPGA Development and Xilinx Vivado
Basic skills
Inverter
Half Adder
Full Adder
Dataflow
Arithmetic
2-bit Full Adder
Seven Segment Decoder
Behavior modeling
Seven Segment Decoder (Full 16 combinations)
Counter
Frequency divider
Procedural assignment
Shift Register
Multiplexer
Multiple IPs
counter_digit_display
an_counter_digit_display
switch_digit_display
button_tone
Design ideas
Persistence of vision
Keypad scanning
PWM application
Bouncing
ILA
miscellanies
associated_files
Supplement
Quick links
儀器借用
Sitemap
TAA Section
More
首頁
Course515025 - EELab(1)
Course515405 - EELab(1)
Course515029 - EELab(2)
2025 Spring Final Exam
Course515105 - DLab
DLab final project
Lab Material
LTspice
Software Environment Introduction
O-Point Analysis
Transient Analysis
AC SWEEP Analysis
DC SWEEP Analysis
Add Model
Save Files
Step Command
Transformer Modeling
Multiple Simulation in one schematic
Temperature Simulation
Special Voltage/Current Source
FPGA Development and Xilinx Vivado
Basic skills
Inverter
Half Adder
Full Adder
Dataflow
Arithmetic
2-bit Full Adder
Seven Segment Decoder
Behavior modeling
Seven Segment Decoder (Full 16 combinations)
Counter
Frequency divider
Procedural assignment
Shift Register
Multiplexer
Multiple IPs
counter_digit_display
an_counter_digit_display
switch_digit_display
button_tone
Design ideas
Persistence of vision
Keypad scanning
PWM application
Bouncing
ILA
miscellanies
associated_files
Supplement
Quick links
儀器借用
Sitemap
TAA Section
FPGA Development and AMD™ Vivado
Outline
Basic skills
Dataflow modelling
Behavior modeling
Examples of integrating multiple modules/IPs
Design ideas
ILA; Inline Logic Analyzer Demo
AMD™ Vivado Miscellanies
Nexys4 DDR Board Support
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