Guidelines 

source: Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill!

Guideline #1: When modeling sequential logic, use nonblocking assignments.

Guideline #2: When modeling latches, use nonblocking assignments.

Guideline #3: When modeling combinational logic with an always block, use blocking assignments.

Guideline #4: When modeling both sequential and combinational logic within the same always block, use nonblocking assignments.

Guideline #5: Do not mix blocking and nonblocking assignments in the same always block.

Guideline #6: Do not make assignments to the same variable from more than one always block.

Guideline #7: Use $strobe to display values that have been assigned using nonblocking assignments.

Guideline #8: Do not make assignments using #0 delays.

Explanation

Please refer to the information on this webpage.

https://zhuanlan.zhihu.com/p/58614706 

Comparison

Results Explanation

Change the statements order

Explanation