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NICS Design Lab
  • Home
  • Lab Q&A
  • Member
    • Professor
    • Student
    • Alumni
  • Research
  • Publication
    • Journal
    • Conference
    • Patent
    • Invited Talk
    • Award & Honor
  • Photo
    • Lab Photo
    • Chip Gallery
  • Lecture
  • Contact
  • More
    • Home
    • Lab Q&A
    • Member
      • Professor
      • Student
      • Alumni
    • Research
    • Publication
      • Journal
      • Conference
      • Patent
      • Invited Talk
      • Award & Honor
    • Photo
      • Lab Photo
      • Chip Gallery
    • Lecture
    • Contact
  • [44] "Tutorial: Recent R&D Trends for High-Bandwidth Memory Interfaces," The 25th International Conference on Electronics, Information, and Communication (ICEIC), 2025.01.18.

  • [43] "Essentials in Recent Data-Centric Trends: High-Speed Interconnect," Semiconductor Industry-Academia-Research Workshop, 2025.10.24.

  • [42] "DRAM Interfaces," Samsung Electronics (High-Speed I/O Expert Program), 2025.08.27.

  • [41] "Transceiver Design for Single-Ended Signaling," Samsung Electronics (High-Speed I/O Expert Program), 2025.08.17.

  • [40] "Memory Interface Design and Its Recent Technology Trends," IDEC Lecture, 2025.07.29-30.

  • [39] "High-Bandwidth Short-Reach Interconnect for Hyper-Scale Computing," Hyper-Scale Computing and Interconnect: For Breaking the Performance Limitation, 2025.07.24.

  • [38] "High-Speed DRAM Interface Design," IDEC Lecture, 2025.05.30.

  • [37] "XSR Target Interconnect," Samsung Science & Technology Foundation, 2025.04.25.

  • [36] "DRAM Interfaces," Samsung Electronics (High-Speed I/O Expert Program), 2024.11.20.

  • [35] "Disruptive Strategy of Memory Interface technology," Samsung Science & Technology Foundation Global Technology Conference, 2024.09.20.

  • [34] "Memory Interface Design and Its Recent Technology Trends," IDEC Lecture, 2024.09.05-06.

  • [33] "Memory Interface Design for AI Systems," AI-SRC Summer Education Workshop, 2023.08.29.

  • [32] "Tutorial: Recent R&D Trends for High-Bandwidth Memory Interfaces," 21st International SoC Design Conference (ISOCC), 2024.08.19.

  • [31] "High-Speed DRAM Interface Design," IDEC Lecture, 2024.07.31.

  • [30] "Recent R&D Trends in Memory Interfaces," Samsung Electronics (Foundry Division), 2024.07.08.

  • [29] "DRAM Interfaces," Samsung Electronics (High-Speed I/O Expert Program), 2024.07.03.

  • [28] "13.9 A 25.2Gb/s/pin NRZ/PAM-3 Dual-Mode Transmitter with Embedded Partial DBI Achieving a 133% I/O Bandwidth/Pin Efficiency and 19.3% DBI Efficiency," ISSCC 2024 Review Workshop, 2024.05.10.

  • [27] "Memory Interface Design Basics," Konkuk University, 2024.02.

  • [26] "DRAM Interfaces," Samsung Electronics (High-Speed I/O Expert Program), 2023.11.01.

  • [25] "Equalization Adaptation," Samsung Electronics (High-Speed I/O Expert Program), 2023.10.31.

  • [24] "RX Equalization," Samsung Electronics (High-Speed I/O Expert Program), 2023.10.31.

  • [23] "Processing-in-Memory (PIM) Circuit Design Basics," Semiconductor Engineering Short Course, 2023.10.06.

  • [22] "Energy-Efficient Data-Dependent Equalization for Memory Interfaces," 23rd RF/Analog Circuit Workshop, 2023.09.21.

  • [21] "Introduction to Memory Interfaces," Korean Intellectual Property Office, 2023.09.19.

  • [20] "eDRAM Architecture and Operation," AI-SRC Summer Education Workshop, 2023.08.09.

  • [19] "Energy-Efficient Data-Dependent Equalization for Memory Interfaces," Qualitas Semiconductor, 2023.07.25.

  • [18] "High-Speed DRAM Interface Design," IDEC Lecture, 2023.07.18.

  • [17] "DRAM Interfaces," Samsung Electronics (High-Speed I/O Expert Program), 2023.04.28.

  • [16] "Receiver Basics," Samsung Electronics (High-Speed I/O Expert Program), 2023.04.11.

  • [15] "Signaling and Transmitter Basics," Samsung Electronics (High-Speed I/O Expert Program), 2023.04.11.

  • [14] "Signaling Basics," Qualitas Semiconductor, 2023.04.04.

  • [13] "High-Speed Memory Interface Design," IDEC Lecture, 2022.12.09.

  • [12] "Transmit-Side Equalizer and Its Recent Trends," Qualitas Semiconductor, 2022.12.08.

  • [11] "Transceiver Design Technique for Highly-Reflective Memory Interfaces," 2022 IEIE Autumn Annual Conference, 2022.11.25.

  • [10] "DRAM Interfaces," Samsung Electronics (High-Speed I/O Expert Program), 2022.10.20.

  • [9] "TX Equalization," Samsung Electronics (High-Speed I/O Expert Program), 2022.10.13.

  • [8] "Channel Basics for High-Speed Interfaces," Qualitas Semiconductor, 2022.09.02.

  • [7] "High-Speed Memory Interface Design," AI-SRC Summer Education Workshop, 2022.08.12.

  • [6] "High-Speed Memory Interface Design," IDEC Lecture, 2022.07.27.

  • [5] "I2C and USB2.0 Interface," Uniqconn, 2022.07.20.

  • [4] "High-Bandwidth Memory Interface Design and Challenges," Qualitas Semiconductor, 2022.05.03.

  • [3] "Digital Serial Interfaces: I2C, SPI, UART, USB, LVDS, and CSI," SeoulTech and Dong-A University, 2022.02.24.

  • [2] "High-Bandwidth Memory Interface Design and Challenges for AI Applications," 21st RF/Analog Circuit Workshop, 2021.09.30.

  • [1] "New Trends and Challenges of Memory for AI Era," 2021 SoC Conference, 2021.08.20.

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