T425 uCode Complete Listing

The following is a complete decoded uCode (aka VBC) listing of the Inmos Transputer T425 Rev. C device. The Inmos T425 device contains 742 (0x2E6) ucode instructions. In the following Vogon Bananna Code listing the numbers are in hexadecimal.

   REV:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromAregSlaveOregFrom0Next ;

   LB:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 288 ;

   BSUB:XbusfromAregYbusfromBregZbusFromXbusPlusYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

   ENDP:XbusfromAregYbusfromConstBox FourfromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 29A ;

   DIFF:XbusfromAregYbusfromBregZbusFromYbusMinusXbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

   ADD:XbusfromAregYbusfromBregStatusErrorfromOverflowZbusFromXbusPlusYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

   GCALL:XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusDataRegfromAregGoto 24A ;

   IN:XbusfromConstBox EventfromCboxYbusfromBregZbusFromXbusMinusYbusAregfromBregSlaveBregfromAregSlaveGoto Cond0FromNotZbusSubLessThan0 ( 127, 126 ) ; // [1, 0 case]

   PROD:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromXbusAndYbusDregfromZbusShiftRightAregGoto Cond1FromAslave0 Cond0FromNotZbusEq0 ( 183, 182, 181, 180 ) ; // [3, 2, 1, 0 case]

   GT:XbusfromAregYbusfromBregZbusFromXbusMinusYbusEregfromZbusBregfromCregSlaveGoto Cond0FromNotZbusSubLessThan0 ( 1E5, 1E4 ) ; // [1, 0 case]

   WSUB:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusOregfromZbusBregfromCregSlaveGoto LDNLP ;

   OUT:XbusfromConstBox EventfromCboxYbusfromBregZbusFromXbusMinusYbusAregfromBregSlaveBregfromAregSlaveGoto Cond0FromNotZbusSubLessThan0 ( B9, B8 ) ; // [1, 0 case]

   SUB:XbusfromAregYbusfromBregStatusErrorfromOverflowZbusFromYbusMinusXbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

   STARTP:XbusfromAregYbusfromConstBox Minus4fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 2BA ;

   OUTBYTE:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusAregfromZbusDataRegfromAregGoto 2D5 ;

   OUTWORD:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusAregfromZbusDataRegfromAregGoto 2D5 ;

  SETERR:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusOregFrom0Next ;

  11:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

  RESETCH:XbusfromAregYbusfromConstBox EventfromCboxZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( 1F1, 1F0 ) ; // [1, 0 case]

  CSUB0:XbusfromAregYbusfromBregZbusFromYbusMinusXbusAregfromBregSlaveBregfromCregSlaveGoto Cond0FromNotCarryOut ( 11, SETERR ) ; // [1, 0 case]

  14:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

  STOPP:XbusfromWptrRegYbusfromConstBox Minus4fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 28D ;

  LADD:XbusfromConstBox OnefromCboxYbusfromCregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 21B, 21A ) ; // [1, 0 case]

  STLB:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusBPtrReg1fromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  STHF:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusFPtrReg0fromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  NORM:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusCregFrom0Goto Cond0FromNotZbusEq0 ( 19D, 19C ) ; // [1, 0 case]

  LDIV:XbusfromAregYbusfromCregZbusFromYbusMinusXbusGoto Cond0FromNotCarryOut ( 219, 218 ) ; // [1, 0 case]

  LDPI:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusOregfromZbusGoto 262 ;

  STLF:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusFPtrReg1fromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  XDBLE:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromXbusAndYbusCregfromBregSlaveGoto Cond0FromNotZbusEq0 ( 215, 214 ) ; // [1, 0 case]

  LDPRI:XbusfromWdescRegYbusfromConstBox OnefromCboxZbusFromXbusAndYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  REM:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusAregfromBregSlaveBregfromAregSlaveGoto Cond0FromNotZbusEq0 ( 1F7, 1F6 ) ; // [1, 0 case]

  RET:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 20F ;

  LEND:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 1E2 ;

  LDTIMER:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto Cond1FromProcPriority ( 1FE, 1FC ) ; // [2, 0 case]

  TESTLDS:XbusfromConstBox All1sfromCboxYbusfromStatusRegZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  TESTLDE:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  TESTLDD:XbusfromDregYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  TESTSTS:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusStatusRegfromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  TESTSTE:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  TESTSTD:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusDregfromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  TESTERR:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusAndYbusBregfromAregSlaveCregfromBregSlaveGoto Cond0FromNotZbusEq0 ( 1EB, 1EA ) ; // [1, 0 case]

  TESTPRANAL:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromAregSlaveCregfromBregSlaveGoto Cond0FromNotPrInAnalyse ( 1E5, 1E4 ) ; // [1, 0 case]

  TIN:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto Cond1FromProcPriority ( 1DA, 1D8 ) ; // [2, 0 case]

  DIV:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusOregfromZbusGoto 22A ;

  TESTHARDCHAN:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusSelectChannelRegfromZbusGoto 17D ;

  DIST:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 1D5, 1D4 ) ; // [1, 0 case]

  DISC:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 1D3, 1D2 ) ; // [1, 0 case]

  DISS:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 1D1, 1D0 ) ; // [1, 0 case]

  LMUL:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto Cond1FromBslave0 ( 1B7, 1B5 ) ; // [2, 0 case]

  NOT:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromNotXbusAregfromZbusOregFrom0Next ;

  XOR:XbusfromAregYbusfromBregZbusFromXbusXorYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

  BCNT:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusOregfromZbusGoto 2C7 ;

  LSHR:XbusfromAregYbusfromConstBox ThirtyTwofromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusSubLessThan0 ( 173, 172 ) ; // [1, 0 case]

  LSHL:XbusfromAregYbusfromConstBox ThirtyTwofromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusSubLessThan0 ( 171, 170 ) ; // [1, 0 case]

  LSUM:XbusfromConstBox OnefromCboxYbusfromCregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 16F, 16E ) ; // [1, 0 case]

  LSUB:XbusfromConstBox OnefromCboxYbusfromCregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 16D, 16C ) ; // [1, 0 case]

  RUNP:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto Cond1FromProcPriority ( 1AE, 1AC ) ; // [2, 0 case]

  XWORD:XbusfromAregYbusfromBregZbusFromXbusAndYbusAregfromBregSlaveBregfromAregSlaveGoto Cond0FromNotZbusEq0 ( 14B, 14A ) ; // [1, 0 case]

  SB:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusOregfromZbusAregfromBregSlaveBregfromAregSlaveCregFrom0Goto 261 ;

  GAJW:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusDataRegfromAregGoto Cond1FromProcPriority ( 11B, 119 ) ; // [2, 0 case]

  SAVEL:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 25B ;

  SAVEH:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 25C ;

  WCNT:XbusfromConstBox EightfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusBregfromAregSlaveCregfromBregSlaveGoto 268 ;

  SHR:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusAregfromBregSlaveBregfromAregSlaveGoto Cond0FromNotZbusEq0 ( 12D, 12C ) ; // [1, 0 case]

  SHL:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto Cond0FromNotZbusEq0 ( 12B, 12A ) ; // [1, 0 case]

  MINT:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  ALT:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 26D ;

  ALTWT:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 274 ;

  ALTEND:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 286 ;

  AND:XbusfromAregYbusfromBregZbusFromXbusAndYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

  ENBT:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 123, 122 ) ; // [1, 0 case]

  ENBC:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 121, 120 ) ; // [1, 0 case]

  ENBS:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 11F, 11E ) ; // [1, 0 case]

  MOVE:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusDregfromZbusGoto Cond0FromNotZbusSubLessThan0 ( 111, 110 ) ; // [1, 0 case]

  OR:XbusfromAregYbusfromBregZbusFromXbusOrYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

  CSNGL:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( C9, C8 ) ; // [1, 0 case]

  CCNT1:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 12F, 12E ) ; // [1, 0 case]

  TALT:XbusfromWptrRegYbusfromConstBox Minus16fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 249 ;

  LDIFF:XbusfromConstBox OnefromCboxYbusfromCregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 217, 216 ) ; // [1, 0 case]

  STHB:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusBPtrReg0fromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  TALTWT:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 93 ;

  SUM:XbusfromAregYbusfromBregZbusFromXbusPlusYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

  MUL:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusOregfromZbusCregFrom0Goto 2C5 ;

  STTIMER:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusClockReg0&1fromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  STOPERR:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( STOPP, 14 ) ; // [1, 0 case]

  CWORD:XbusfromAregYbusfromBregZbusFromXbusPlusYbusDregfromZbusAregfromBregSlaveBregfromAregSlaveGoto 2D8 ;

  CLRHALTERR:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusOregFrom0Next ;

  SETHALTERR:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusOregFrom0Next ;

  TESTHALTERR:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromStatusRegZbusFromNotXbusOrYbusBregfromAregSlaveCregfromBregSlaveGoto Cond0FromNotZbusEq0 ( 1E5, 1E4 ) ; // [1, 0 case]

  DUP:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  MOVE2DINIT:XbusfromConstBox ExtendFunctionsfromCboxYbusfromBregZbusFromXbusOregfromZbusGoto Cond1FromProcPriority ( C7, C5 ) ; // [2, 0 case]

  MOVE2DALL:XbusfromConstBox bit15to8fromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto Cond1FromProcPriority ( EB, E9 ) ; // [2, 0 case]

  MOVE2DNONZERO:XbusfromConstBox bit22to16fromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto Cond1FromProcPriority ( EB, E9 ) ; // [2, 0 case]

  MOVE2DZERO:XbusfromConstBox Mov2dbitsMaskfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto Cond1FromProcPriority ( EB, E9 ) ; // [2, 0 case]

  5F:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromXbusPlusYbusBPtrReg1fromZbusGoto 124 ;

  60:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

  61:XbusfromConstBox TwofromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusGoto Cond1FromProcPriority ( F6, F4 ) ; // [2, 0 case]

  62:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromYbusMemWriteDataRegfromZbusResetChannelReadyNotRunlatchResetChannelRunReqlatchGoto Cond1FromChannelReadyNotRun ( 1C7, 1C5 ) ; // [2, 0 case]

  UNPACKSN:XbusfromConstBox All1sfromCboxYbusfromConstBoxShiftLeftBregGoto 2A7 ;

  64:XbusfromConstBox FourfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto 2E0 ;

  65:XbusfromDataInYbusfromConstBox MinIntplus2fromCboxZbusFromYbusMinusXbusGoto Cond0FromNotZbusEq0 ( 67, 66 ) ; // [1, 0 case]

  66:XbusfromConstBox TwofromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto 2E5 ;

  67:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 2D9 ;

  68:XbusfromConstBox FourfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto Cond1FromChNotTimerReq ( 6A, 68 ) ; // [2, 0 case]

  69:XbusfromConstBox Link3InputfromCboxYbusfromCregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 91, 90 ) ; // [1, 0 case]

  6A:XbusfromChannelDataYbusfromConstBox ByteMaskfromCboxZbusFromXbusAndYbusOregfromZbusMemWriteLowPriorityChannelAckGoto Cond0FromNotZbusEq0 ( 6F, 6E ) ; // [1, 0 case]

  6B:XbusfromConstBox All1sfromCboxYbusfromConstBoxChannelStackfromZbusGoto 2D2 ;

  POSTNORMSN:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 240 ;

  ROUNDSN:XbusfromConstBox ByteMaskfromCboxYbusfromCregZbusFromYbusMinusXbusAregfromBregSlaveShiftLeftBregDataRegfromAregGoto Cond0FromNotZbusSubLessThan0 ( LDINF, 70 ) ; // [1, 0 case]

  6E:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusOregfromZbusDisableChannelStatusGoto 2D0 ;

  6F:XbusfromConstBox OnefromCboxYbusfromOregZbusFromXbusMinusYbusDisableChannelStatusGoto Cond0FromNotZbusEq0 ( 85, 84 ) ; // [1, 0 case]

  70:XbusfromConstBox ThirtySixfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto 15F ;

  LDINF:XbusfromAregYbusfromConstBox PositiveInfinityZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  FMUL:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusOregfromZbusCregFrom0Goto 236 ;

  CFLERR:XbusfromAregYbusfromConstBox PositiveInfinityZbusFromXbusAndYbusDregfromZbusGoto 26A ;

  CRCWORD:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromBregZbusFromMinusXbusOregfromZbusBregfromCregSlaveCregfromBregSlaveGoto 2BE ;

  CRCBYTE:XbusfromConstBox ThirtyTwofromCboxYbusfromBregZbusFromMinusXbusOregfromZbusBregfromCregSlaveCregfromBregSlaveGoto 2BE ;

  BITCNT:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusShiftRightAregGoto Cond1FromAslave0 Cond0FromNotZbusEq0 ( 1CF, 1CE, 1CD, 1CC ) ; // [3, 2, 1, 0 case]

  BITREVWORD:XbusfromConstBox HundredThirtyTwofromCboxYbusfromBregZbusFromMinusXbusOregfromZbusAregfromBregSlaveBregfromAregSlaveGoto 233 ;

  BITREVNBITS:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusPlus0cOregfromZbusAregfromBregSlaveBregfromCregSlaveGoto 23B ;

  POP:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusCregfromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

  TIMERDISABLEH:ResetTEnabled0XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

  TIMERDISABLEL:ResetTEnabled1XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

  TIMERENABLEH:XbusfromAregYbusfromConstBox TptrLoc0fromCboxZbusFromYbusDregfromZbusMemReadDataMemAddrFromZbusGoto 237 ;

  TIMERENABLEL:XbusfromAregYbusfromConstBox TptrLoc1fromCboxZbusFromYbusDregfromZbusMemReadDataMemAddrFromZbusGoto 237 ;

  LDMEMSTARTVAL:XbusfromAregYbusfromConstBox MemStartfromCBoxZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

  7F:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto 21D ;

  80:XbusfromChannelDataYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusEnableChannelandEnableChannelStatusGoto 68 ;

  WSUBDB:XbusfromConstBox All1sfromCboxYbusfromConstBoxShiftLeftBregGoto WSUB ;

  82:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 28C ;

  83:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto 2DD ;

  84:XbusfromConstBox SixteenfromCboxYbusfromCregZbusFromYbusMinusXbusOregfromZbusGoto 2D0 ;

  85:XbusfromConstBox MemStartfromCBoxYbusfromBregZbusFromXbusChannelStackfromZbusGoto 2C6 ;

  86:XbusfromConstBox All1sfromCboxYbusfromConstBoxMemWriteGoto 2CF ;

  87:ResetTEnabled0XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusGoto 2C1 ;

  88:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto Cond1FromChNotTimerReq ( 8A, 88 ) ; // [2, 0 case]

  89:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto Cond1FromChNotTimerReq ( 8B, 89 ) ; // [2, 0 case]

  8A:XbusfromConstBox MemStartfromCBoxYbusfromBregZbusFromXbusIptrRegFromZbusDisableChannelStatusGoto 2E4 ;

  8B:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusAndNot[BPWminus1]SelectChannelRegfromZbusMemReadLowPriorityChannelAckGoto 2CE ;

  8C:XbusfromConstBox ThirtyTwofromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 8F, 8E ) ; // [1, 0 case]

  8D:XbusfromAregYbusfromConstBox EregIntSaveLocfromCboxZbusFromYbusMemReadDataMemAddrFromZbusGoto 2A5 ;

  8E:XbusfromConstBox SixteenfromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusGoto 1A2 ;

  8F:XbusfromConstBox ThirtyTwofromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusGoto 2A0 ;

  90:XbusfromConstBox Link3OutputfromCboxYbusfromBregZbusFromXbusCregfromZbusGoto 91 ;

  91:XbusfromConstBox FourfromCboxYbusfromCregZbusFromXbusPlusYbusCregfromZbusSelectChannelRegfromZbusGoto 2D3 ;

  92:XbusfromConstBox MostPosMinus1YbusfromBregZbusFromXbusIptrRegFromZbusGoto 1C9 ;

  93:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 147 ;

  94:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto 1AC ;

  95:XbusfromConstBox FourfromCboxYbusfromCregZbusFromXbusPlusYbusCregfromZbusMemReadWordIncOregDataMemAddrFromZbusGoto Cond0FromNotIncOregCarryOut ( CF, CE ) ; // [1, 0 case]

  96:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusPlus1EregfromZbusGoto 1AE ;

  97:XbusfromConstBox FourfromCboxYbusfromCregZbusFromXbusPlusYbusCregfromZbusMemReadWordIncOregDataMemAddrFromZbusGoto Cond0FromNotIncOregCarryOut ( CD, CC ) ; // [1, 0 case]

  98:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusShiftRightBregCregFromZbusSR1CregShInMsbfromArithLogicGoto 2C4 ;

  99:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusShiftRightBregCregFromZbusSR1CregShInMsbfromArithLogicWordIncDregGoto Cond1fromBslave1 Cond0FromNotIncDregCarryOut ( 9B, 9A, 99, 98 ) ; // [3, 2, 1, 0 case]

  9A:XbusfromAregYbusfromCregZbusFromYbusMinusXbusShiftRightBregCregFromZbusSR1CregShInMsbfromArithLogicGoto 2C4 ;

  9B:XbusfromAregYbusfromCregZbusFromXbusPlusYbusShiftRightBregCregFromZbusSR1CregShInMsbfromArithLogicWordIncDregGoto Cond1fromBslave1 Cond0FromNotIncDregCarryOut ( 9B, 9A, 99, 98 ) ; // [3, 2, 1, 0 case]

  FPTESTERR:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromAregSlaveCregfromBregSlaveGoto 1E4 ;

  9D:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbuscCregFromZbusSR1CregShInMsbfromCarryOutWordIncDregGoto Cond0FromNotIncDregCarryOut ( 167, 166 ) ; // [1, 0 case]

  9E:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

  9F:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusOregFrom0Next ;

  A0:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemWriteWordIncDregDataInfromPrevReadRegDataRegfromByteShifterByteWriteStrobeEnableDataMemAddrFromZbusGoto Cond0FromNotIncDregCarryOut ( B7, B6 ) ; // [1, 0 case]

  A1:XbusfromConstBox FourfromCboxYbusfromCregZbusFromXbusPlusYbusCregfromZbusMemReadWordIncOregDataInfromPrevReadRegDataMemAddrFromZbusGoto Cond0FromNotIncOregCarryOut ( BF, BE ) ; // [1, 0 case]

  A2:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemWriteWordIncDregDataInfromPrevReadRegDataRegfromByteShifterByteWriteStrobeEnableDataMemAddrFromZbusGoto Cond0FromNotIncDregCarryOut ( B7, B6 ) ; // [1, 0 case]

  A3:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemWriteWordIncDregDataInfromPrevReadRegDataRegfromByteShifterByteWriteStrobeEnableDataMemAddrFromZbusGoto Cond1FromProcPriority ( 97, 95 ) ; // [2, 0 case]

  A4:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusAregfromZbusBregfromAregSlaveOregFrom0Next ;

  A5:XbusfromAregYbusFromCregSL1ZbusFromXbusXorYbusCregfromZbusShiftLeftBregWordIncOregGoto Cond1FromDivStep1 Cond0FromNotIncOregCarryOut ( A7, A6, A5, A4 ) ; // [3, 2, 1, 0 case]

  A6:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusAregfromZbusBregfromAregSlaveOregFrom0Next ;

  A7:XbusfromConstBox All1sfromCboxYbusFromCregSL1ZbusFromYbusCregfromZbusShiftLeftBregWordIncOregGoto Cond1FromDivStep1 Cond0FromNotIncOregCarryOut ( A7, A6, A5, A4 ) ; // [3, 2, 1, 0 case]

  A8:XbusfromConstBox ClearMove2dbitsfromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusOregFrom0Next ;

  A9:XbusfromConstBox SixteenfromCboxYbusfromOregZbusFromXbusPlusYbusMemReadAregfromDataInDataMemAddrFromZbusGoto 2C3 ;

  AA:XbusfromWdescRegYbusfromConstBox OnefromCboxZbusFromXbusAndYbusOregfromZbusGoto Cond1FromHighNotLowReq Cond0FromNotZbusEq0 ( FB, FA, F9, F8 ) ; // [3, 2, 1, 0 case]

  AB:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusDataMemAddrFromZbusGoto 271 ;

  AC:XbusfromConstBox TwofromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 61, 60 ) ; // [1, 0 case]

  AD:XbusfromConstBox EightfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 8D, 8C ) ; // [1, 0 case]

  AE:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusBregfromCregSlaveMemWriteDataRegfromZbusOregFrom0Next ;

  AF:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromCregSlaveOregFrom0Next ;

  B0:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto Cond1FromProcPriority ( 146, 144 ) ; // [2, 0 case]

  BREAK:XbusfromAregYbusfromConstBox MemStartfromCBoxZbusFromYbusDregfromZbusMemReadDataMemAddrFromZbusGoto Cond1FromProcPriority ( 176, 174 ) ; // [2, 0 case]

  CLRJ0BREAK:XbusfromConstBox PositiveInfinityYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusOregFrom0Next ;

  SETJ0BREAK:XbusfromConstBox PositiveInfinityYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusOregFrom0Next ;

  TESTJ0BREAK:XbusfromConstBox PositiveInfinityYbusfromStatusRegZbusFromNotXbusOrYbusBregfromAregSlaveCregfromBregSlaveGoto Cond0FromNotZbusEq0 ( 1E5, 1E4 ) ; // [1, 0 case]

  B5:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusSelectChannelRegfromZbusDataMemAddrFromZbusGoto 282 ;

  B6:XbusfromConstBox Mov2dbitsMaskfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond1FromProcPriority Cond0FromNotZbusEq0 ( C3, C2, C1, C0 ) ; // [3, 2, 1, 0 case]

  B7:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusMemWriteWordIncDregDataInfromPrevReadRegDataRegfromByteShifterDataMemAddrFromZbusGoto B6 ;

  B8:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 2D6 ;

  B9:XbusfromWptrRegYbusfromConstBox Minus4fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 28A ;

  BA:XbusfromConstBox ByteMaskfromCboxYbusfromCregZbusFromXbusAndYbusBregfromZbusAregfromBregSlaveDataRegfromAregGoto Cond0FromNotZbusEq0 ( D5, D4 ) ; // [1, 0 case]

  BB:XbusfromConstBox All1sfromCboxYbusFromCregSL1ZbusFromYbusCregfromZbusShiftLeftBregWordIncDregGoto Cond0FromNotIncDregCarryOut ( BB, BA ) ; // [1, 0 case]

  BC:ResetTEnabled1XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusBregfromZbusGoto 87 ;

  BD:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusStatusRegfromZbusGoto BC ;

  BE:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemWriteWordIncDregDataRegfromByteShifterByteWriteStrobeEnableDataMemAddrFromZbusGoto Cond0FromNotIncDregCarryOut ( B7, B6 ) ; // [1, 0 case]

  BF:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemWriteWordIncDregDataRegfromByteShifterByteWriteStrobeEnableDataMemAddrFromZbusGoto Cond1FromProcPriority ( 97, 95 ) ; // [2, 0 case]

  C0:XbusfromConstBox FourfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( CB, CA ) ; // [1, 0 case]

  C1:XbusfromConstBox ExtendFunctionsfromCboxYbusfromBregZbusFromXbusOregfromZbusGoto 2B2 ;

  C2:XbusfromConstBox FourfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( CB, CA ) ; // [1, 0 case]

  C3:XbusfromConstBox CRCFunctionLocfromCboxYbusfromBregZbusFromXbusOregfromZbusGoto 2B2 ;

  C4:XbusfromConstBox FourfromCboxYbusfromCregZbusFromXbusPlusYbusCregfromZbusMemReadWordIncOregDataMemAddrFromZbusGoto Cond0FromNotIncOregCarryOut ( CD, CC ) ; // [1, 0 case]

  C5:XbusfromConstBox ZerofromCboxYbusfromOregZbusFromXbusPlusYbusAregfromBregSlaveBregfromCregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 2B7 ;

  C6:XbusfromConstBox EightfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto Cond1FromNotTwoReadsToStart ( F7, F5 ) ; // [2, 0 case]

  C7:XbusfromConstBox TwentyfromCBoxYbusfromOregZbusFromXbusPlusYbusOregfromZbusGoto C5 ;

  C8:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusBregfromCregSlaveGoto Cond0FromNotZbusEq0 ( 9F, 9E ) ; // [1, 0 case]

  C9:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromNotYbusBregfromCregSlaveGoto Cond0FromNotZbusEq0 ( 9F, 9E ) ; // [1, 0 case]

  CA:XbusfromConstBox ClearMove2dbitsfromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusOregFrom0Next ;

  CB:XbusfromConstBox TwelvefromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusGoto Cond1FromProcPriority ( 1AE, 1AC ) ; // [2, 0 case]

  CC:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusMemWriteWordIncDregDataRegfromByteShifterDataMemAddrFromZbusGoto Cond0FromNotIncDregCarryOut ( B7, B6 ) ; // [1, 0 case]

  CD:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusMemWriteWordIncDregDataRegfromByteShifterDataMemAddrFromZbusGoto Cond1FromHighNotLowReq ( C6, C4 ) ; // [2, 0 case]

  CE:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusMemWriteWordIncDregDataRegfromByteShifterDataMemAddrFromZbusGoto Cond0FromNotIncDregCarryOut ( B7, B6 ) ; // [1, 0 case]

  CF:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusMemWriteWordIncDregDataRegfromByteShifterDataMemAddrFromZbusGoto 95 ;

  D0:XbusfromConstBox FourfromCboxYbusfromOregZbusFromXbusPlusYbusAregfromBregSlaveBregfromAregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 2B0 ;

  D1:XbusfromConstBox Mov2dbitsMaskfromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusOregFrom0Next ;

  D2:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusDataMemAddrFromZbusGoto 271 ;

  D3:XbusfromDataInYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 29E ;

  D4:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusShiftRightAregGoto Cond0FromNotZbusEq0 ( ED, EC ) ; // [1, 0 case]

  D5:XbusfromConstBox ByteMaskfromCboxYbusfromBregZbusFromXbusMinusYbusShiftRightAregGoto Cond0FromNotZbusEq0 ( D7, D6 ) ; // [1, 0 case]

  D6:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( D9, D8 ) ; // [1, 0 case]

  D7:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromXbusOrYbusAregfromZbusGoto 2A6 ;

  D8:XbusfromDataInYbusfromConstBox TwofromCboxZbusFromXbusPlusYbusCregfromZbusGoto 2AD ;

  D9:XbusfromDataInYbusfromConstBox ThreefromCboxZbusFromXbusPlusYbusCregfromZbusGoto 2AD ;

  DA:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemReadDataMemAddrFromZbusGoto 281 ;

  DB:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusSelectChannelRegfromZbusDataMemAddrFromZbusGoto 272 ;

  DC:XbusfromAregYbusfromConstBox MinIntplus1fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 28F ;

  DD:XbusfromWptrRegYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 2A8 ;

  DE:XbusfromConstBox SixtyFourfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 105, 104 ) ; // [1, 0 case]

  DF:XbusfromDataInYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto Cond1FromProcPriority ( EA, E8 ) ; // [2, 0 case]

  E0:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto Cond1FromProcPriority ( FE, FC ) ; // [2, 0 case]

  E1:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusPlusYbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( F6, F4 ) ; // [2, 0 case]

  E2:XbusfromFPtrReg1YbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 115, 114 ) ; // [1, 0 case]

  E3:XbusfromAregYbusfromConstBox IptrIntSaveLocfromCboxZbusFromYbusOregfromZbusMemReadDataMemAddrFromZbusGoto 224 ;

  E4:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 28C ;

  E5:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto 294 ;

  E6:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusBregfromCregSlaveMemWriteDataRegfromZbusOregFrom0Next ;

  E7:XbusfromDataInYbusfromEregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( F3, F2 ) ; // [1, 0 case]

  E8:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusTNextReg0fromZbusDataInfromPrevReadRegGoto DE ;

  E9:XbusfromConstBox ExtendFunctionsfromCboxYbusfromBregZbusFromXbusOregfromZbusGoto 2A4 ;

  EA:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusTNextReg1fromZbusDataInfromPrevReadRegGoto DE ;

  EB:XbusfromConstBox CRCFunctionLocfromCboxYbusfromBregZbusFromXbusOregfromZbusGoto 2A4 ;

  EC:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusCregfromZbusGoto 2AD ;

  ED:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusBregfromZbusGoto 2A6 ;

  EE:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromYbusFPtrReg0fromZbusGoto 251 ;

  EF:XbusfromFPtrReg0YbusfromConstBox Minus8fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 234 ;

  F0:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromYbusFPtrReg1fromZbusGoto 251 ;

  F1:XbusfromFPtrReg1YbusfromConstBox Minus8fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 2A2 ;

  F2:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromCregSlaveOregFrom0Next ;

  F3:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 280 ;

  F4:XbusfromFPtrReg0YbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond1FromTimeOutReq Cond0FromNotZbusEq0 ( 10B, 10A, 109, 108 ) ; // [3, 2, 1, 0 case]

  F5:XbusfromConstBox FourfromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusMemWriteWordIncDregDataInfromPrevReadRegDataRegfromByteShifterDataMemAddrFromZbusGoto F7 ;

  F6:ResetTimeOutLatchXbusfromFPtrReg1YbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 115, 114 ) ; // [1, 0 case]

  F7:XbusfromConstBox FourfromCboxYbusfromOregZbusFromXbusMinusYbusAregfromZbusGoto 29C ;

  F8:XbusfromConstBox Minus16fromCboxYbusfromCregZbusFromXbusPlusYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 276 ;

  F9:XbusfromConstBox Minus16fromCboxYbusfromCregZbusFromXbusPlusYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 276 ;

  FA:XbusfromConstBox Minus16fromCboxYbusfromCregZbusFromXbusPlusYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 276 ;

  FB:XbusfromConstBox ThirtyTwofromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto Cond1FromChNotTimerReq ( CHAN0REQ, TIMER0REQ ) ; // [2, 0 case]

  FC:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusPlus0WdescRegfromZbusGoto 24A ;

  FD:XbusfromFPtrReg1YbusfromBPtrReg1ZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( F1, F0 ) ; // [1, 0 case]

  FE:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusPlus1WdescRegfromZbusGoto 24A ;

  FF:XbusfromFPtrReg1YbusfromBPtrReg1ZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( F1, F0 ) ; // [1, 0 case]

100:XbusfromAregYbusfromConstBox TptrLoc0fromCboxZbusFromYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 276 ;

101:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusDataInfromPrevReadRegDisableChannelStatusGoto 26F ;

102:XbusfromAregYbusfromConstBox TptrLoc1fromCboxZbusFromYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 276 ;

103:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusDataInfromPrevReadRegClearAltEnabledLatchGoto 26E ;

104:XbusfromWptrRegYbusfromConstBox Minus4fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 28D ;

105:XbusfromConstBox SixtyFourfromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusGoto 1D4 ;

106:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

107:XbusfromAregYbusfromConstBox MinIntplus2fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto STOPP ;

108:XbusfromAregYbusfromConstBox WdescIntSavefromCboxZbusFromYbusMemReadDataMemAddrFromZbusGoto 299 ;

109:XbusfromFPtrReg0YbusfromConstBox All1sfromCboxZbusFromXbusWdescRegfromZbusGoto 22C ;

10A:XbusfromAregYbusfromConstBox WdescIntSavefromCboxZbusFromYbusMemReadDataMemAddrFromZbusGoto 299 ;

10B:XbusfromFPtrReg0YbusfromConstBox All1sfromCboxZbusFromXbusWdescRegfromZbusGoto 22C ;

10C:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusDataInfromPrevReadRegDisableChannelStatusGoto 26F ;

10D:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusBregfromCregSlaveMemWriteDataRegfromZbusSetAltEnabledLatchGoto 29F ;

10E:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusDataInfromPrevReadRegClearAltEnabledLatchGoto 26E ;

10F:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusBregfromCregSlaveMemWriteDataMemAddrFromZbusGoto 29F ;

110:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusMemReadDataMemAddrFromZbusGoto 228 ;

111:XbusfromConstBox FourfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( CB, CA ) ; // [1, 0 case]

112:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto 124 ;

113:XbusfromConstBox MinIntfromCboxYbusfromBregZbusFromXbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( 1AE, 1AC ) ; // [2, 0 case]

114:ResetTimeOutLatchXbusfromConstBox MinIntfromCboxYbusfromBregZbusFromXbusPlus1OregfromZbusWdescRegfromZbusGoto Cond1FromChOrTimerReq ( 116, 114 ) ; // [2, 0 case]

115:XbusfromFPtrReg1YbusfromConstBox All1sfromCboxZbusFromXbusPlus1WdescRegfromZbusGoto Cond1FromTimeOutReq ( FF, FD ) ; // [2, 0 case]

116:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

117:XbusfromDataInYbusfromConstBox MinIntplus3fromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 1F3, 1F2 ) ; // [1, 0 case]

118:ResetTEnabled0XbusfromAregYbusfromConstBox TptrLoc0fromCboxZbusFromYbusMemReadDataMemAddrFromZbusGoto 29B ;

119:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusWdescRegfromZbusOregFrom0Next ;

11A:ResetTEnabled1XbusfromAregYbusfromConstBox TptrLoc1fromCboxZbusFromYbusMemReadDataMemAddrFromZbusGoto 29B ;

11B:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusPlus1WdescRegfromZbusOregFrom0Next ;

11C:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 124 ;

11D:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( 1AE, 1AC ) ; // [2, 0 case]

11E:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

11F:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 273 ;

120:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromCregSlaveOregFrom0Next ;

121:XbusfromConstBox EventfromCboxYbusfromBregZbusFromXbusMinusYbusGoto Cond0FromNotZbusSubLessThan0 ( DB, DA ) ; // [1, 0 case]

122:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromCregSlaveOregFrom0Next ;

123:XbusfromWptrRegYbusfromConstBox Minus16fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 29D ;

124:XbusfromConstBox FiftySixfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( AD, AC ) ; // [1, 0 case]

125:XbusfromDataInYbusfromConstBox MinIntplus1fromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 11D, 11C ) ; // [1, 0 case]

126:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 295 ;

127:XbusfromWptrRegYbusfromConstBox Minus4fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 28A ;

128:XbusfromIptrRegYbusfromOregZbusFromXbusPlusYbusIptrRegFromZbusGoto 1C9 ;

129:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

12A:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

12B:XbusfromAregYbusfromConstBox OnefromCboxZbusFromXbusMinusYbusAregfromZbusShiftLeftBregGoto Cond0FromNotZbusEq0 ( 12B, 12A ) ; // [1, 0 case]

12C:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromCregSlaveOregFrom0Next ;

12D:XbusfromConstBox OnefromCboxYbusfromBregZbusFromYbusMinusXbusBregfromZbusShiftRightAregGoto Cond0FromNotZbusEq0 ( 12D, 12C ) ; // [1, 0 case]

12E:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

12F:XbusfromAregYbusfromBregZbusFromYbusMinus[XbusPlus1]AregfromBregSlaveBregfromCregSlaveGoto Cond0FromNotCarryOut ( 11, SETERR ) ; // [1, 0 case]

130:XbusfromConstBox All1sfromCboxYbusfromOregYbusByteSelMaskZbusFromYbusBregfromZbusAregfromBregSlaveOregFrom0Next ;

131:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0ShiftRightBregWordIncDregGoto Cond0FromNotIncDregCarryOut ( 131, 130 ) ; // [1, 0 case]

132:XbusfromConstBox All1sfromCboxYbusfromOregYbusByteSelMaskZbusFromYbusBregfromZbusAregfromBregSlaveOregFrom0Next ;

133:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFromMinus1ShiftRightBregWordIncDregGoto Cond0FromNotIncDregCarryOut ( 133, 132 ) ; // [1, 0 case]

134:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusWdescRegfromZbusGoto 251 ;

135:XbusfromAregYbusfromConstBox IptrIntSaveLocfromCboxZbusFromYbusDataMemAddrFromZbusGoto 24F ;

136:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromXbusPlusYbusFPtrReg1fromZbusGoto 5F ;

137:XbusfromConstBox Minus8fromCboxYbusfromBPtrReg1ZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 252 ;

138:XbusfromDregYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

139:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusShiftRightAregShiftLeftBregGoto Cond1FromAslave0 Cond0FromNotZbusEq0 ( 13B, 13A, 139, 138 ) ; // [3, 2, 1, 0 case]

13A:XbusfromDregYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

13B:XbusfromDregYbusfromBregZbusFromXbusPlusYbusDregfromZbusShiftRightAregShiftLeftBregGoto Cond1FromAslave0 ( 182, 180 ) ; // [2, 0 case]

13C:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusFPtrReg0fromZbusGoto 21C ;

13D:XbusfromConstBox Minus8fromCboxYbusfromBPtrReg0ZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 253 ;

13E:XbusfromFPtrReg0YbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 13D, 13C ) ; // [1, 0 case]

13F:XbusfromFPtrReg1YbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 137, 136 ) ; // [1, 0 case]

140:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

141:XbusfromAregYbusfromConstBox ByteMaskfromCboxZbusFromYbusCregfromZbusOregFrom0Next ;

142:XbusfromAregYbusfromConstBox WdescIntSavefromCboxZbusFromYbusOregfromZbusDataMemAddrFromZbusGoto 248 ;

143:XbusfromWptrRegYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 149, 148 ) ; // [1, 0 case]

144:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

145:XbusfromAregYbusfromConstBox MemStartfromCBoxZbusFromYbusDregfromZbusMemReadDataMemAddrFromZbusGoto Cond1FromProcPriority ( 176, 174 ) ; // [2, 0 case]

146:XbusfromConstBox TwofromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto 2CD ;

147:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 117 ;

148:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusWdescRegfromZbusGoto 251 ;

149:XbusfromFPtrReg1YbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 137, 136 ) ; // [1, 0 case]

14A:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromCregSlaveOregFrom0Next ;

14B:XbusfromConstBox All1sfromCboxYbusfromConstBoxShiftLeftBregGoto 25A ;

14C:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0AregfromZbusBregfromZbusCregfromZbusOregFrom0Next ;

14D:XbusfromConstBox All1sfromCboxYbusFromOregSL2ZbusFromYbusDregfromZbusBregfromAregSlaveCregfromBregSlaveGoto 14F ;

14E:XbusfromAregYbusfromBregZbusFromXbusOrYbusAregfromZbusBregfromCregSlaveCregFrom0OregFrom0Next ;

14F:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbuscShiftRightBregCregFromZbusSR1CregShInMsbfromCarryOutWordIncDregGoto Cond0FromNotIncDregCarryOut ( 14F, 14E ) ; // [1, 0 case]

150:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusWdescRegfromZbusDataInfromPrevReadRegGoto 24C ;

151:XbusfromConstBox All1sfromCboxYbusFromCregSL1ZbusFromYbusCregfromZbusShiftLeftBregWordIncOregGoto Cond1FromCslaveMsb ( 153, 151 ) ; // [2, 0 case]

152:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusPlus1WdescRegfromZbusDataInfromPrevReadRegGoto 24C ;

153:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusShiftRightBregCregFromZbusSR1Goto 23D ;

154:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

155:XbusfromConstBox All1sfromCboxYbusFromCregSL1ZbusFromYbusCregfromZbusShiftLeftBregWordIncDregGoto Cond0FromNotIncDregCarryOut ( 155, 154 ) ; // [1, 0 case]

156:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

157:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbuscShiftRightBregCregFromZbusSR1CregShInMsbfromCarryOutWordIncDregGoto Cond0FromNotIncDregCarryOut ( 157, 156 ) ; // [1, 0 case]

158:XbusfromDregYbusfromConstBox MinIntfromCboxZbusFromYbusMinusXbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

159:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusShiftRightAregShiftLeftBregGoto Cond1FromAslave0 Cond0FromNotZbusEq0 ( 15B, 15A, 159, 158 ) ; // [3, 2, 1, 0 case]

15A:XbusfromDregYbusfromConstBox MinIntfromCboxZbusFromYbusMinusXbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

15B:XbusfromDregYbusfromBregZbusFromXbusPlusYbusDregfromZbusShiftRightAregShiftLeftBregGoto Cond1FromAslave0 ( 15B, 159 ) ; // [2, 0 case]

15C:XbusfromConstBox Minus23fromCboxYbusfromCregZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( 14D, 14C ) ; // [1, 0 case]

15D:XbusfromConstBox ByteMaskfromCboxYbusfromCregZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( 141, 140 ) ; // [1, 0 case]

15E:XbusfromAregYbusfromConstBox HaltOnErrorBitfromCboxZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 165, 164 ) ; // [1, 0 case]

15F:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbuscShiftRightBregCregFromZbusSR1CregShInMsbfromCarryOutWordIncDregGoto Cond0FromNotIncDregCarryOut ( 15F, 15E ) ; // [1, 0 case]

160:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusBregfromZbusOregFrom0Next ;

161:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0BregfromZbusOregFrom0Next ;

162:XbusfromConstBox SixtyFourfromCboxYbusfromBregZbusFromXbusCregfromZbusOregFrom0Next ;

163:XbusfromConstBox FourfromCboxYbusfromCregZbusFromYbusMinusXbusOregfromZbusBregfromAregSlaveCregfromBregSlaveGoto 151 ;

164:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveOregFrom0Next ;

165:XbusfromAregYbusfromConstBox HundredTwenySevenfromCboxZbusFromXbusAndYbusEregfromZbusGoto Cond1FromBslave0 ( 16B, 169 ) ; // [2, 0 case]

166:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

167:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbuscCregFromZbusSR1CregShInMsbfromCarryOutOregFrom0Next ;

168:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusAregfromZbusMemWriteDataRegfromByteShifterByteWriteStrobeEnableOregFrom0Next ;

169:XbusfromDataInYbusfromEregZbusFromXbusOrYbusGoto Cond0FromNotZbusEq0 ( 16B, 16A ) ; // [1, 0 case]

16A:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveOregFrom0Next ;

16B:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusPlusYbusAregfromZbusBregfromZbusOregFrom0Next ;

16C:XbusfromAregYbusfromBregStatusErrorfromOverflowZbusFromYbusMinusXbusAregfromZbusOregFrom0Next ;

16D:XbusfromAregYbusfromBregStatusErrorfromOverflowZbusFromYbusMinus[XbusPlus1]AregfromZbusOregFrom0Next ;

16E:XbusfromAregYbusfromBregZbusFromXbusPlusYbusAregfromZbusGoto Cond0FromNotCarryOut ( 161, 160 ) ; // [1, 0 case]

16F:XbusfromAregYbusfromBregZbusFromYbusPlusXbusPlus1AregfromZbusGoto Cond0FromNotCarryOut ( 161, 160 ) ; // [1, 0 case]

170:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusOregfromZbusGoto 242 ;

171:XbusfromAregYbusfromConstBox ThirtyTwofromCboxZbusFromXbusMinusYbusAregfromZbusCregFrom0Goto 258 ;

172:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusOregfromZbusGoto 241 ;

173:XbusfromAregYbusfromConstBox ThirtyTwofromCboxZbusFromXbusMinusYbusAregfromZbusBregfromCregSlaveCregFrom0Goto 172 ;

174:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto Cond1FromProcPriority ( 152, 150 ) ; // [2, 0 case]

175:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto Cond1FromBslaveMsb ( 1AF, 1AD ) ; // [2, 0 case]

176:XbusfromAregYbusfromConstBox MemStartplus8fromCBoxZbusFromYbusDregfromZbusMemReadDataMemAddrFromZbusGoto 174 ;

177:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusAregfromZbusGoto Cond1FromBslaveMsb ( 1AF, 1AD ) ; // [2, 0 case]

178:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusTNextReg0fromZbusDataInfromPrevReadRegOregFrom0Next ;

179:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusTNextReg1fromZbusDataInfromPrevReadRegOregFrom0Next ;

17A:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 185, 184 ) ; // [1, 0 case]

17B:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusGoto 184 ;

LDDEVID:XbusfromAregYbusfromConstBox DevIdfromCBoxZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

17D:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusChannelStackfromZbusChannelDataRegfromUbusGoto 27A ;

17E:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

17F:XbusfromDataInYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 23A ;

180:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusShiftRightAregShiftLeftBregGoto Cond1FromAslave0 Cond0FromNotZbusEq0 ( 13B, 13A, 139, 138 ) ; // [3, 2, 1, 0 case]

181:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromYbusMinusXbusAregfromZbusGoto 159 ;

182:XbusfromDregYbusfromBregZbusFromXbusPlusYbusDregfromZbusShiftRightAregShiftLeftBregGoto Cond1FromAslave0 ( 182, 180 ) ; // [2, 0 case]

183:XbusfromAregYbusfromConstBox MostPosZbusFromXbusXorYbusAregfromZbusGoto 15B ;

184:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusBregfromZbusAregfromBregSlaveOregFrom0Next ;

185:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusGoto 184 ;

186:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 17B, 17A ) ; // [1, 0 case]

187:XbusfromDregYbusfromConstBox ZerofromCboxZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( 1E1, 1E0 ) ; // [1, 0 case]

188:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( 1AE, 1AC ) ; // [2, 0 case]

189:XbusfromConstBox FiftySixfromCboxYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( AD, AC ) ; // [1, 0 case]

18A:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 231 ;

18B:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusAregfromZbusOregFrom0Next ;

18C:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusBregfromZbusAregfromBregSlaveOregFrom0Next ;

18D:XbusfromConstBox All1sfromCboxYbusfromConstBoxShiftRightAregShiftLeftBregWordIncOregGoto Cond1FromAslave0 Cond0FromNotIncOregCarryOut ( 18F, 18E, 18D, 18C ) ; // [3, 2, 1, 0 case]

18E:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusBregfromZbusAregfromBregSlaveOregFrom0Next ;

18F:XbusfromConstBox All1sfromCboxYbusfromConstBoxShiftRightAregShiftLeftBregBregShIn0From1WordIncOregGoto Cond1FromAslave0 Cond0FromNotIncOregCarryOut ( 18F, 18E, 18D, 18C ) ; // [3, 2, 1, 0 case]

190:XbusfromConstBox OnefromCboxYbusfromBregZbusFromNotXbusAndYbusAregfromZbusBregfromCregSlaveGoto Cond1FromBslaveMsb ( 186, 184 ) ; // [2, 0 case]

191:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusShiftRightBregCregFromZbusSR1CregShInMsbfromArithLogicWordIncDregGoto Cond1fromBslave1 Cond0FromNotIncDregCarryOut ( 193, 192, 191, 190 ) ; // [3, 2, 1, 0 case]

192:XbusfromAregYbusfromCregStatusErrorfromOverflowZbusFromYbusMinusXbusCregfromZbusGoto 190 ;

193:XbusfromAregYbusfromCregZbusFromXbusPlusYbusShiftRightBregCregFromZbusSR1CregShInMsbfromArithLogicWordIncDregGoto Cond1fromBslave1 Cond0FromNotIncDregCarryOut ( 193, 192, 191, 190 ) ; // [3, 2, 1, 0 case]

194:XbusfromAregYbusfromConstBox OnefromCboxZbusFromYbusAregfromZbusBregfromCregSlaveMemWriteOregFrom0Next ;

195:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

196:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusTNextReg0fromZbusDataInfromPrevReadRegGoto 19E ;

197:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusTNextReg1fromZbusDataInfromPrevReadRegGoto 19E ;

198:XbusfromWptrRegYbusfromConstBox Minus16fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 226 ;

199:XbusfromWdescRegYbusfromConstBox OnefromCboxZbusFromXbusAndYbusOregfromZbusGoto Cond1FromHighNotLowReq Cond0FromNotZbusEq0 ( 1A3, 1A2, 1A1, 1A0 ) ; // [3, 2, 1, 0 case]

19A:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusPlus1CregfromZbusMemWriteDataInfromPrevReadRegDataRegfromZbusGoto J ;

19B:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto Cond1FromTimeOutReq ( 1CB, 1C9 ) ; // [2, 0 case]

19C:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromBregZbusFromXbusCregfromZbusAregfromBregSlaveBregfromAregSlaveGoto 23E ;

19D:XbusfromConstBox FourfromCboxYbusfromCregZbusFromYbusMinusXbusOregfromZbusBregfromAregSlaveCregfromBregSlaveGoto 151 ;

19E:XbusfromConstBox Minus12fromCboxYbusfromEregZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 235 ;

19F:XbusfromConstBox Minus20fromCboxYbusfromOregZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 22F ;

1A0:XbusfromConstBox Minus16fromCboxYbusfromCregZbusFromXbusPlusYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 221 ;

1A1:XbusfromConstBox Minus16fromCboxYbusfromCregZbusFromXbusPlusYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 221 ;

1A2:XbusfromConstBox Minus16fromCboxYbusfromCregZbusFromXbusPlusYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 221 ;

1A3:XbusfromConstBox SixteenfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto Cond1FromChNotTimerReq ( CHAN0REQ, TIMER0REQ ) ; // [2, 0 case]

1A4:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 1C1, 1C0 ) ; // [1, 0 case]

1A5:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 1C1, 1C0 ) ; // [1, 0 case]

1A6:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusMemReadDataMemAddrFromZbusGoto 21F ;

1A7:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusSelectChannelRegfromZbusDataMemAddrFromZbusGoto 62 ;

1A8:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusAregfromZbusOregFrom0Next ;

1A9:XbusfromDataInYbusfromConstBox MinIntplus1fromCboxZbusFromXbusMinusYbusGoto Cond1FromProcPriority Cond0FromNotZbusEq0 ( 1BB, 1BA, 1B9, 1B8 ) ; // [3, 2, 1, 0 case]

1AA:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromYbusAregfromZbusOregFrom0Next ;

1AB:XbusfromDataInYbusfromEregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 1C3, 1C2 ) ; // [1, 0 case]

1AC:XbusfromConstBox OnefromCboxYbusfromEregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 13F, 13E ) ; // [1, 0 case]

1AD:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto 1BF ;

1AE:XbusfromConstBox OnefromCboxYbusfromEregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 143, 142 ) ; // [1, 0 case]

1AF:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromMinusYbusBregfromZbusGoto 1AD ;

1B0:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

1B1:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusPlus1AregfromZbusGoto 26B ;

1B2:XbusfromConstBox MinIntfromCboxYbusfromBregZbusFromXbusMemWriteDataInfromPrevReadRegDataRegfromZbusOregFrom0Next ;

1B3:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromXbusPlusYbusOregfromZbusResetChannelResetChannelReadyNotRunlatchResetChannelRunReqlatchGoto Cond0FromNotIncOregCarryOut ( 1B3, 1B2 ) ; // [1, 0 case]

1B4:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

1B5:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbuscShiftRightBregCregFromZbusSR1CregShInMsbfromCarryOutWordIncDregGoto Cond1fromBslave1 Cond0FromNotIncDregCarryOut ( 1B7, 1B6, 1B5, 1B4 ) ; // [3, 2, 1, 0 case]

1B6:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

1B7:XbusfromAregYbusfromCregZbusFromXbusPlusYbusShiftRightBregCregFromZbusSR1CregShInMsbfromCarryOutWordIncDregGoto Cond1fromBslave1 Cond0FromNotIncDregCarryOut ( 1B7, 1B6, 1B5, 1B4 ) ; // [3, 2, 1, 0 case]

1B8:XbusfromWptrRegYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 28E ;

1B9:XbusfromAregYbusfromConstBox TptrLoc0fromCboxZbusFromYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 221 ;

1BA:XbusfromWptrRegYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 28E ;

1BB:XbusfromAregYbusfromConstBox TptrLoc1fromCboxZbusFromYbusBregfromZbusMemReadDataMemAddrFromZbusGoto 221 ;

1BC:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusAndYbusShiftLeftBregGoto Cond0FromNotZbusEq0 ( 1D7, 1D6 ) ; // [1, 0 case]

1BD:XbusfromAregYbusFromCregSL1ZbusFromXbusPlusYbusCregfromZbusShiftLeftBregWordIncDregGoto Cond1FromDivStep0 Cond0FromNotIncDregCarryOut ( 1BF, 1BE, 1BD, 1BC ) ; // [3, 2, 1, 0 case]

1BE:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusAndYbusShiftLeftBregBregShIn0From1Goto Cond0FromNotZbusEq0 ( 1D7, 1D6 ) ; // [1, 0 case]

1BF:XbusfromAregYbusFromCregSL1ZbusFromYbusMinusXbusCregfromZbusShiftLeftBregBregShIn0From1WordIncDregGoto Cond1FromDivStep1 Cond0FromNotIncDregCarryOut ( 1BF, 1BE, 1BD, 1BC ) ; // [3, 2, 1, 0 case]

1C0:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto 1D6 ;

1C1:XbusfromAregYbusfromBregZbusFromXbusXorYbusAregfromBregSlaveBregfromAregSlaveCregFrom0DataRegfromZbusGoto Cond1FromBslaveMsb ( 177, 175 ) ; // [2, 0 case]

1C2:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 1D2 ;

1C3:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 231 ;

1C4:XbusfromConstBox All1sfromCboxYbusfromConstBoxGoto Cond1FromBslaveMsb ( 1DB, 1D9 ) ; // [2, 0 case]

1C5:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromYbusAregfromZbusOregFrom0Next ;

1C6:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusAregfromZbusGoto Cond1FromBslaveMsb ( 1DB, 1D9 ) ; // [2, 0 case]

1C7:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 231 ;

1C8:XbusfromConstBox PositiveInfinityYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 145, 144 ) ; // [1, 0 case]

1C9:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

1CA:XbusfromConstBox PositiveInfinityYbusfromStatusRegZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( BREAK, B0 ) ; // [1, 0 case]

1CB:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto Cond1FromProcPriority ( 146, 144 ) ; // [2, 0 case]

1CC:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

1CD:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromXbusMinusYbusShiftRightAregGoto Cond1FromAslave0 Cond0FromNotZbusEq0 ( 1CF, 1CE, 1CD, 1CC ) ; // [3, 2, 1, 0 case]

1CE:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

1CF:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusPlusYbusBregfromZbusShiftRightAregGoto Cond1FromAslave0 ( 1CF, 1CD ) ; // [2, 0 case]

1D0:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

1D1:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemReadDataMemAddrFromZbusGoto 231 ;

1D2:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromYbusAregfromZbusOregFrom0Next ;

1D3:XbusfromConstBox EventfromCboxYbusfromCregZbusFromXbusMinusYbusGoto Cond0FromNotZbusSubLessThan0 ( 1A7, 1A6 ) ; // [1, 0 case]

1D4:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusAregfromZbusOregFrom0Next ;

1D5:XbusfromWptrRegYbusfromConstBox Minus16fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 227 ;

1D6:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusBregfromZbusAregfromBregSlaveOregFrom0Next ;

1D7:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromMinusYbusBregfromZbusGoto 1D6 ;

1D8:XbusfromAregYbusfromClockReg0ZbusFromYbusMinusXbusDregfromZbusGoto 222 ;

1D9:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto 1DF ;

1DA:XbusfromAregYbusfromClockReg1ZbusFromYbusMinusXbusDregfromZbusGoto 222 ;

1DB:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromMinusYbusBregfromZbusGoto 1D9 ;

1DC:XbusfromAregYbusfromCregZbusFromXbusPlusYbusCregfromZbusGoto 1DE ;

1DD:XbusfromAregYbusFromCregSL1ZbusFromXbusPlusYbusCregfromZbusShiftLeftBregWordIncDregGoto Cond1FromDivStep0 Cond0FromNotIncDregCarryOut ( 1DF, 1DE, 1DD, 1DC ) ; // [3, 2, 1, 0 case]

1DE:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusAndYbusBregfromCregSlaveGoto Cond0FromNotZbusEq0 ( 1D7, 1D6 ) ; // [1, 0 case]

1DF:XbusfromAregYbusFromCregSL1ZbusFromYbusMinusXbusCregfromZbusShiftLeftBregBregShIn0From1WordIncDregGoto Cond1FromDivStep1 Cond0FromNotIncDregCarryOut ( 1DF, 1DE, 1DD, 1DC ) ; // [3, 2, 1, 0 case]

1E0:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 23C ;

1E1:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusPlus1AregfromZbusGoto 26B ;

1E2:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusPlusYbusCregfromZbusMemWriteDataInfromPrevReadRegDataRegfromZbusGoto 21E ;

1E3:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusOregfromZbusGoto 151 ;

1E4:XbusfromAregYbusfromConstBox OnefromCboxZbusFromYbusAregfromZbusOregFrom0Next ;

1E5:XbusfromAregYbusfromConstBox ZerofromCboxZbusFromYbusAregfromZbusOregFrom0Next ;

1E6:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemReadDataMemAddrFromZbusGoto 25E ;

1E7:XbusfromConstBox All1sfromCboxYbusfromConstBoxOregFrom0Next ;

1E8:XbusfromWptrRegYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusMemReadAregfromDataInDataMemAddrFromZbusGoto Cond1FromProcPriority ( 212, 210 ) ; // [2, 0 case]

1E9:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 107 ;

1EA:XbusfromAregYbusfromConstBox OnefromCboxZbusFromYbusAregfromZbusOregFrom0Next ;

1EB:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromNotXbusAndYbusStatusRegfromZbusGoto 1E5 ;

1EC:XbusfromAregYbusfromCregZbusFromXbusPlusYbusCregfromZbusShiftLeftBregGoto 1B4 ;

1ED:XbusfromAregYbusFromCregSL1ZbusFromXbusPlusYbusCregfromZbusShiftLeftBregWordIncDregGoto Cond1FromDivStep0 Cond0FromNotIncDregCarryOut ( 1EF, 1EE, 1ED, 1EC ) ; // [3, 2, 1, 0 case]

1EE:XbusfromConstBox All1sfromCboxYbusfromConstBoxShiftLeftBregBregShIn0From1Goto 1B4 ;

1EF:XbusfromAregYbusFromCregSL1ZbusFromYbusMinusXbusCregfromZbusShiftLeftBregBregShIn0From1WordIncDregGoto Cond1FromDivStep1 Cond0FromNotIncDregCarryOut ( 1EF, 1EE, 1ED, 1EC ) ; // [3, 2, 1, 0 case]

1F0:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusMemReadAregfromDataInDataMemAddrFromZbusGoto 1B2 ;

1F1:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusSelectChannelRegfromZbusMemReadAregfromDataInDataMemAddrFromZbusGoto 1B3 ;

1F2:XbusfromWptrRegYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto Cond1FromProcPriority ( 213, 211 ) ; // [2, 0 case]

1F3:XbusfromWptrRegYbusfromConstBox Minus16fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 25D ;

1F4:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0BregfromZbusOregFrom0Next ;

1F5:XbusfromConstBox OnefromCboxYbusfromBregZbusFromXbusBregfromZbusOregFrom0Next ;

1F6:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusBregfromCregSlaveOregFrom0Next ;

1F7:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusOregfromZbusAregfromBregSlaveBregfromAregSlaveCregFrom0DataRegfromAregGoto Cond1FromBslaveMsb ( 1C6, 1C4 ) ; // [2, 0 case]

TIMER1REQ:ResetTEnabled1XbusfromAregYbusfromConstBox TptrLoc1fromCboxZbusFromYbusOregfromZbusDregfromZbusMemReadDataMemAddrFromZbusGoto 238 ;

TIMER0REQ:ResetTEnabled0XbusfromAregYbusfromConstBox TptrLoc0fromCboxZbusFromYbusOregfromZbusDregfromZbusMemReadDataMemAddrFromZbusGoto 239 ;

CHAN1REQ:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0OregfromZbusLowPriorityChannelAckGoto 275 ;

CHAN0REQ:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0OregfromZbusHighPriorityChannelAckGoto 279 ;

1FC:XbusfromConstBox All1sfromCboxYbusfromClockReg0ZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

1FD:XbusfromConstBox All1sfromCboxYbusfromBPtrReg1ZbusFromYbusDataRegfromZbusGoto 25F ;

1FE:XbusfromConstBox All1sfromCboxYbusfromClockReg1ZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

START:ResetTimeOutLatchXbusfromConstBox FlagsMaskfromCboxYbusfromStatusRegZbusFromXbusAndYbusStatusRegfromZbusGoto Cond0FromNotPrInAnalyse ( BD, BC ) ; // [1, 0 case]

J:XbusfromIptrRegYbusfromOregZbusFromXbusPlusYbusIptrRegFromZbusGoto 244 ;

LDLP:XbusfromWptrRegYbusFromOregSL2ZbusFromXbusPlusYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

PFIX:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusOregFromZbusSL4Next ;

LDNL:XbusfromAregYbusFromOregSL2ZbusFromXbusPlusYbusMemReadAregfromDataInDataMemAddrFromZbusGoto 1C9 ;

LDC:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusAregfromZbusBregfromAregSlaveCregfromBregSlaveOregFrom0Next ;

LDNLP:XbusfromAregYbusFromOregSL2ZbusFromXbusPlusYbusAregfromZbusOregFrom0Next ;

NFIX:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromNotYbusOregFromZbusSL4Next ;

LDL:XbusfromWptrRegYbusFromOregSL2ZbusFromXbusPlusYbusBregfromAregSlaveCregfromBregSlaveMemReadAregfromDataInDataMemAddrFromZbusGoto 1C9 ;

ADC:XbusfromAregYbusfromOregStatusErrorfromOverflowZbusFromXbusPlusYbusAregfromZbusOregFrom0Next ;

CALL:XbusfromWdescRegYbusfromConstBox SixteenfromCboxZbusFromXbusMinusYbusWdescRegfromZbusDataMemAddrFromZbusGoto 269 ;

CJ:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusGoto Cond0FromNotZbusEq0 ( 129, 128 ) ; // [1, 0 case]

AJW:XbusfromWdescRegYbusFromOregSL2ZbusFromXbusPlusYbusWdescRegfromZbusOregFrom0Next ;

EQC:XbusfromAregYbusfromOregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 1E5, 1E4 ) ; // [1, 0 case]

STL:XbusfromWptrRegYbusFromOregSL2ZbusFromXbusPlusYbusAregfromBregSlaveBregfromCregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusOregFrom0Next ;

STNL:XbusfromAregYbusFromOregSL2ZbusFromXbusPlusYbusAregfromBregSlaveBregfromCregSlaveDataMemAddrFromZbusGoto 2B8 ;

20F:XbusfromWdescRegYbusfromConstBox SixteenfromCboxZbusFromXbusPlusYbusWdescRegfromZbusGoto 24A ;

210:XbusfromAregYbusfromClockReg0ZbusFromYbusMinusXbusDregfromZbusDataInfromPrevReadRegGoto 187 ;

211:XbusfromAregYbusfromClockReg0ZbusFromYbusMemWriteDataRegfromZbusOregFrom0Next ;

212:XbusfromAregYbusfromClockReg1ZbusFromYbusMinusXbusDregfromZbusDataInfromPrevReadRegGoto 187 ;

213:XbusfromAregYbusfromClockReg1ZbusFromYbusMemWriteDataRegfromZbusOregFrom0Next ;

214:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0BregfromZbusOregFrom0Next ;

215:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFromMinus1BregfromZbusOregFrom0Next ;

216:XbusfromAregYbusfromBregZbusFromYbusMinusXbusAregfromZbusGoto Cond0FromNotCarryOut ( 1F5, 1F4 ) ; // [1, 0 case]

217:XbusfromAregYbusfromBregZbusFromYbusMinus[XbusPlus1]AregfromZbusGoto Cond0FromNotCarryOut ( 1F5, 1F4 ) ; // [1, 0 case]

218:XbusfromConstBox MinIntfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusAregfromBregSlaveBregfromCregSlaveOregFrom0Next ;

219:XbusfromConstBox HaltOnErrorBitfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto 1EF ;

21A:XbusfromAregYbusfromBregStatusErrorfromOverflowZbusFromXbusPlusYbusAregfromZbusOregFrom0Next ;

21B:XbusfromAregYbusfromBregStatusErrorfromOverflowZbusFromYbusPlusXbusPlus1AregfromZbusOregFrom0Next ;

21C:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusBPtrReg0fromZbusGoto 124 ;

21D:XbusfromAregYbusfromConstBox ByteMaskfromCboxZbusFromXbusAndYbusAregfromZbusOregFrom0Next ;

21E:XbusfromConstBox ZerofromCboxYbusfromCregZbusFromXbusMinusYbusGoto Cond0FromNotZbusSubLessThan0 ( 1E7, 1E6 ) ; // [1, 0 case]

21F:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto 27D ;

220:XbusfromAregYbusfromConstBox AregSaveLocfromCboxZbusFromYbusMemReadAregfromDataInDataMemAddrFromZbusGoto 296 ;

221:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusCregfromZbusDataInfromPrevReadRegGoto 22E ;

222:XbusfromDregYbusfromConstBox ZerofromCboxZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( 1B1, 1B0 ) ; // [1, 0 case]

223:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusOregfromZbusDataInfromPrevReadRegGoto 2B5 ;

224:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusIptrRegFromZbusDataInfromPrevReadRegGoto 27C ;

225:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusMemWriteDataRegfromZbusGoto 22B ;

226:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusMemWriteDataMemAddrFromZbusGoto 22D ;

227:XbusfromDataInYbusfromConstBox MinIntplus2fromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 1A9, 1A8 ) ; // [1, 0 case]

228:XbusfromDregYbusfromCregYbusByteSelMaskZbusFromXbusMinusYbusOregfromZbusGoto 230 ;

229:XbusfromDataInYbusfromConstBox Minus16fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 223 ;

22A:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusMinusYbusAregfromBregSlaveBregfromAregSlaveGoto Cond0FromNotZbusEq0 ( 1A5, 1A4 ) ; // [1, 0 case]

22B:XbusfromConstBox MinIntfromCboxYbusfromOregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 19F, 19E ) ; // [1, 0 case]

22C:XbusfromFPtrReg0YbusfromBPtrReg0ZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( EF, EE ) ; // [1, 0 case]

22D:XbusfromAregYbusfromConstBox MinIntplus2fromCboxZbusFromYbusCregfromZbusGoto 2AB ;

22E:XbusfromWptrRegYbusfromCregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 199, 198 ) ; // [1, 0 case]

22F:XbusfromConstBox OnefromCboxYbusfromEregZbusFromXbusAndYbusGoto Cond0FromNotZbusEq0 ( 197, 196 ) ; // [1, 0 case]

230:XbusfromDregYbusfromBregYbusByteSelMaskZbusFromXbusMinusYbusDregfromZbusWordIncOregGoto Cond1FromNotTwoReadsToStart Cond0FromNotIncOregCarryOut ( A3, A2, A1, A0 ) ; // [3, 2, 1, 0 case]

231:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusMinusYbusDataRegfromAregDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 195, 194 ) ; // [1, 0 case]

232:XbusfromDregYbusfromConstBox ZerofromCboxZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( 18B, 18A ) ; // [1, 0 case]

233:XbusfromConstBox All1sfromCboxYbusfromConstBoxZbusFrom0BregfromZbusAregfromBregSlaveDataRegfromAregGoto 18D ;

234:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusFPtrReg0fromZbusDataInfromPrevReadRegGoto 251 ;

235:XbusfromDataInYbusfromConstBox MinIntplus2fromCboxZbusFromYbusMinusXbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 189, 188 ) ; // [1, 0 case]

236:XbusfromConstBox HundredTwenyFourfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto Cond1FromBslave0 ( 193, 191 ) ; // [2, 0 case]

237:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 17F, 17E ) ; // [1, 0 case]

238:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusPlus1EregfromZbusDataInfromPrevReadRegGoto 229 ;

239:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusDataInfromPrevReadRegGoto 229 ;

23A:XbusfromDregYbusfromConstBox TptrLoc0fromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 179, 178 ) ; // [1, 0 case]

23B:XbusfromConstBox All1sfromCboxYbusFromOregSL2ZbusFromYbusOregfromZbusAregfromBregSlaveBregfromAregSlaveGoto 233 ;

23C:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 1F2 ;

23D:XbusfromConstBox EightfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusAregfromBregSlaveBregfromCregSlaveGoto 9D ;

23E:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 163, 162 ) ; // [1, 0 case]

23F:XbusfromConstBox OnefromCboxYbusfromCregZbusFromYbusMinusXbusOregfromZbusGoto Cond0FromNotZbusSubLessThan0 ( 15D, 15C ) ; // [1, 0 case]

240:XbusfromDataInYbusfromCregZbusFromXbusMinusYbusCregfromZbusDataInfromPrevReadRegGoto 23F ;

241:XbusfromConstBox All1sfromCboxYbusFromOregSL2ZbusFromYbusDregfromZbusGoto Cond0FromNotZbusEq0 ( 157, 156 ) ; // [1, 0 case]

242:XbusfromConstBox All1sfromCboxYbusFromOregSL2ZbusFromYbusDregfromZbusGoto Cond0FromNotZbusEq0 ( 155, 154 ) ; // [1, 0 case]

243:XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto 254 ;

244:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusGoto Cond1FromTimeOutReq Cond0FromNotZbusEq0 ( 1CB, 1CA, 1C9, 1C8 ) ; // [3, 2, 1, 0 case]

245:XbusfromAregYbusfromConstBox CregSaveLocfromCboxZbusFromYbusMemWriteDataRegfromAregDataMemAddrFromZbusGoto 24E ;

246:XbusfromAregYbusfromConstBox BregSaveLocfromCboxZbusFromYbusAregfromBregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 245 ;

247:XbusfromAregYbusfromConstBox AregSaveLocfromCboxZbusFromYbusAregfromBregSlaveBregfromCregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 246 ;

248:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 257 ;

249:XbusfromAregYbusfromConstBox MinIntplus2fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto ALT ;

24A:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusIptrRegFromZbusDataInfromPrevReadRegGoto 1C9 ;

24B:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusMemWriteDataRegfromZbusOregFrom0Next ;

24C:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusMemWriteDataRegfromZbusGoto 255 ;

24D:XbusfromConstBox All1sfromCboxYbusfromStatusRegZbusFromYbusMemWriteDataRegfromZbusGoto 259 ;

24E:XbusfromAregYbusfromConstBox StatusIntSaveLocfromCboxZbusFromYbusDataMemAddrFromZbusGoto 24D ;

24F:XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 247 ;

250:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusIptrRegFromZbusDataInfromPrevReadRegGoto 1C9 ;

251:XbusfromWptrRegYbusfromConstBox Minus4fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 250 ;

252:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromXbusPlusYbusMemWriteDataRegfromZbusGoto 5F ;

253:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusMemWriteDataRegfromZbusGoto 21C ;

254:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusIptrRegFromZbusDataInfromPrevReadRegGoto 24B ;

255:XbusfromDregYbusfromConstBox FourfromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 243 ;

256:XbusfromAregYbusfromOregZbusFromXbusOrYbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

257:XbusfromWptrRegYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 135, 134 ) ; // [1, 0 case]

258:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusOregfromZbusBregfromCregSlaveCregfromBregSlaveGoto 242 ;

259:XbusfromConstBox FlagsMaskfromCboxYbusfromStatusRegZbusFromXbusAndYbusStatusRegfromZbusGoto 134 ;

25A:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusOregfromZbusGoto 256 ;

25B:XbusfromFPtrReg1YbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 1FD ;

25C:XbusfromFPtrReg0YbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 260 ;

25D:XbusfromDataInYbusfromConstBox MinIntplus1fromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 1E9, 1E8 ) ; // [1, 0 case]

25E:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromMinusXbusOregfromZbusGoto 19A ;

25F:XbusfromAregYbusfromConstBox FourfromCboxZbusFromXbusPlusYbusAregfromBregSlaveBregfromCregSlaveMemWriteDataMemAddrFromZbusOregFrom0Next ;

260:XbusfromConstBox All1sfromCboxYbusfromBPtrReg0ZbusFromYbusDataRegfromZbusGoto 25F ;

261:XbusfromAregYbusfromConstBox Minus3fromCboxZbusFromYbusDregfromZbusAregfromZbusDataRegfromAregGoto 267 ;

262:XbusfromIptrRegYbusfromOregZbusFromXbusMinusYbusAregfromZbusOregFrom0Next ;

263:XbusfromWptrRegYbusfromConstBox TwelvefromCboxZbusFromXbusPlusYbusMemWriteDataRegfromAregDataMemAddrFromZbusGoto 262 ;

264:XbusfromWptrRegYbusfromConstBox EightfromCboxZbusFromXbusPlusYbusAregfromBregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 263 ;

265:XbusfromWptrRegYbusfromConstBox FourfromCboxZbusFromXbusPlusYbusAregfromBregSlaveBregfromCregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 264 ;

266:XbusfromIptrRegYbusfromOregZbusFromXbusPlusYbusIptrRegFromZbusGoto 265 ;

267:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromYbusDataInfromPrevReadRegDataMemAddrFromZbusGoto 168 ;

268:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusOregfromZbusGoto Cond1FromBslaveMsb ( 133, 131 ) ; // [2, 0 case]

269:XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 266 ;

26A:XbusfromDregYbusfromConstBox PositiveInfinityZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 11, SETERR ) ; // [1, 0 case]

26B:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 277 ;

26C:XbusfromDataInYbusfromConstBox MinIntplus3fromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 125, 124 ) ; // [1, 0 case]

26D:XbusfromAregYbusfromConstBox MinIntplus1fromCboxZbusFromYbusMemWriteDataRegfromZbusOregFrom0Next ;

26E:XbusfromDataInYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 26C ;

26F:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( 113, 112 ) ; // [1, 0 case]

270:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( 11A, 118 ) ; // [2, 0 case]

271:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 285 ;

272:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusDataRegfromZbusResetChannelReadyNotRunlatchResetChannelRunReqlatchGoto Cond1FromChannelReadyNotRun ( 10F, 10D ) ; // [2, 0 case]

273:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMemWriteDataRegfromZbusOregFrom0Next ;

274:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 287 ;

275:XbusfromConstBox All1sfromCboxYbusfromConstBoxMemReadDataMemAddrfromSelectChannelRegGoto Cond1FromChannelReadyNotRun ( 10E, 10C ) ; // [2, 0 case]

276:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusCregfromZbusDataInfromPrevReadRegGoto 2A1 ;

277:XbusfromAregYbusfromConstBox MinIntplus2fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 27F ;

278:XbusfromDataInYbusfromConstBox MinIntplus3fromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 107, 106 ) ; // [1, 0 case]

279:XbusfromConstBox All1sfromCboxYbusfromConstBoxMemReadDataMemAddrfromSelectChannelRegGoto Cond1FromChannelReadyNotRun ( 103, 101 ) ; // [2, 0 case]

27A:XbusfromChannelDataYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusBregfromCregSlaveOregFrom0Next ;

27B:XbusfromAregYbusfromConstBox BregSaveLocfromCboxZbusFromYbusMemReadAregfromDataInDataMemAddrFromZbusGoto 297 ;

27C:XbusfromAregYbusfromConstBox CregSaveLocfromCboxZbusFromYbusMemReadAregfromDataInDataMemAddrFromZbusGoto 27B ;

27D:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 1AB, 1AA ) ; // [1, 0 case]

27E:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( 102, 100 ) ; // [2, 0 case]

27F:XbusfromWptrRegYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 27E ;

280:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusBregfromCregSlaveMemWriteDataRegfromZbusOregFrom0Next ;

281:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto 290 ;

282:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusChannelStackfromZbusResetChannelRunReqlatchGoto 289 ;

283:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusStatusRegfromZbusDataInfromPrevReadRegGoto 124 ;

284:XbusfromAregYbusfromConstBox StatusIntSaveLocfromCboxZbusFromYbusMemReadDataMemAddrFromZbusGoto 283 ;

285:XbusfromWptrRegYbusfromConstBox Minus16fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 270 ;

286:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusOregfromZbusDataInfromPrevReadRegGoto 128 ;

287:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 278 ;

288:XbusfromAregYbusfromConstBox MemStartfromCBoxZbusFromYbusMemWriteAregfromDataInDataInfromPrevReadRegDataRegfromByteShifterDataMemAddrFromZbusGoto 7F ;

289:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromMinusYbusChannelStackfromZbusGoto 292 ;

28A:XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto B5 ;

28B:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusMemWriteDataRegfromZbusGoto STOPP ;

28C:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 28B ;

28D:XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( F6, F4 ) ; // [2, 0 case]

28E:XbusfromDataInYbusfromCregZbusFromXbusMinusYbusDregfromZbusDataInfromPrevReadRegGoto 232 ;

28F:XbusfromWptrRegYbusfromConstBox Minus20fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto AE ;

290:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( E7, E6 ) ; // [1, 0 case]

291:XbusfromConstBox All1sfromCboxYbusfromConstBoxEnableChannelandEnableChannelStatusGoto Cond1FromProcPriority ( F6, F4 ) ; // [2, 0 case]

292:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 291 ;

293:XbusfromConstBox FourfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto 2A9 ;

294:XbusfromAregYbusfromConstBox MinIntfromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 2AA ;

295:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( E5, E4 ) ; // [1, 0 case]

296:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromAregSlaveCregfromBregSlaveGoto 284 ;

297:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromAregSlaveGoto 220 ;

298:XbusfromWptrRegYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( E3, E2 ) ; // [1, 0 case]

299:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusWdescRegfromZbusDataInfromPrevReadRegGoto 298 ;

29A:XbusfromDataInYbusfromConstBox OnefromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( E1, E0 ) ; // [1, 0 case]

29B:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( DF, DE ) ; // [1, 0 case]

29C:XbusfromAregYbusfromCregYbusByteSelMaskZbusFromXbusMinusYbusAregfromZbusGoto 2B4 ;

29D:XbusfromDataInYbusfromConstBox MinIntplus2fromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( DD, DC ) ; // [1, 0 case]

29E:XbusfromDataInYbusfromEregZbusFromYbusMinusXbusDregfromZbusDataInfromPrevReadRegGoto 2AF ;

29F:OregFrom0Next ;

2A0:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusGoto FA ;

2A1:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusGoto Cond0FromNotZbusEq0 ( D3, D2 ) ; // [1, 0 case]

2A2:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusFPtrReg1fromZbusDataInfromPrevReadRegGoto 251 ;

2A3:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromMinusXbusBregfromCregSlaveCregfromBregSlaveDataInfromPrevReadRegGoto Cond0FromNotZbusSubLessThan0 ( D1, D0 ) ; // [1, 0 case]

2A4:XbusfromConstBox ZerofromCboxYbusfromOregZbusFromXbusPlusYbusAregfromBregSlaveBregfromAregSlaveMemReadDataMemAddrFromZbusGoto 2A3 ;

2A5:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusEregfromZbusDataInfromPrevReadRegGoto MOVE ;

2A6:XbusfromDataInYbusfromConstBox OnefromCboxZbusFromXbusPlusYbusCregfromZbusGoto 2AD ;

2A7:XbusfromConstBox ThirtySixfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusAregfromBregSlaveBregfromAregSlaveGoto BB ;

2A8:XbusfromDataInYbusfromBregZbusFromXbusMinusYbusDregfromZbusDataInfromPrevReadRegGoto 2AE ;

2A9:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusCregfromZbusAregfromBregSlaveBregfromCregSlaveDataInfromPrevReadRegGoto MOVE ;

2AA:XbusfromConstBox Minus12fromCboxYbusfromEregZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 293 ;

2AB:XbusfromConstBox SixtyFourfromCboxYbusfromStatusRegZbusFromXbusOrYbusStatusRegfromZbusGoto 285 ;

2AC:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusEregfromZbusAregfromZbusBregfromAregSlaveCregfromBregSlaveGoto MOVE ;

2AD:XbusfromDataInYbusfromCregZbusFromXbusPlusYbusCregfromZbusOregFrom0Next ;

2AE:XbusfromDregYbusfromConstBox ZerofromCboxZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( AF, AE ) ; // [1, 0 case]

2AF:XbusfromDregYbusfromConstBox ZerofromCboxZbusFromYbusMinusXbusGoto Cond0FromNotZbusSubLessThan0 ( AB, AA ) ; // [1, 0 case]

2B0:XbusfromConstBox TwelvefromCboxYbusfromOregZbusFromXbusPlusYbusAregfromBregSlaveBregfromAregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 2AC ;

2B1:XbusfromDataInYbusfromConstBox OnefromCboxZbusFromXbusMinusYbusMemWriteDataInfromPrevReadRegDataRegfromZbusGoto Cond0FromNotZbusEq0 ( A9, A8 ) ; // [1, 0 case]

2B2:XbusfromConstBox ZerofromCboxYbusfromOregZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 2B1 ;

2B3:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusMemWriteDataRegfromZbusGoto Cond1FromChNotTimerReq ( CHAN0REQ, TIMER0REQ ) ; // [2, 0 case]

2B4:XbusfromAregYbusfromConstBox EregIntSaveLocfromCboxZbusFromYbusDataMemAddrFromZbusGoto 2B3 ;

2B5:XbusfromAregYbusfromConstBox MinIntplus1fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 2B6 ;

2B6:XbusfromDregYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 225 ;

2B7:XbusfromConstBox EightfromCboxYbusfromOregZbusFromXbusPlusYbusAregfromBregSlaveMemWriteDataRegfromAregDataMemAddrFromZbusGoto 2BB ;

2B8:XbusfromConstBox All1sfromCboxYbusfromConstBoxAregfromBregSlaveMemWriteDataRegfromAregOregFrom0Next ;

2B9:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusAregfromZbusEnableChannelandEnableChannelStatusGoto 89 ;

2BA:XbusfromIptrRegYbusfromBregZbusFromXbusPlusYbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( 96, 94 ) ; // [2, 0 case]

2BB:XbusfromConstBox SixteenfromCboxYbusfromOregZbusFromXbusPlusYbusMemWriteDataRegfromAregDataMemAddrFromZbusOregFrom0Next ;

2BC:XbusfromDataInYbusfromBregZbusFromXbusPlusYbusBregfromZbusMemWriteDataInfromPrevReadRegDataRegfromZbusGoto MOVE ;

2BD:XbusfromConstBox FourfromCboxYbusfromOregZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 2BF ;

2BE:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusAregfromBregSlaveBregfromAregSlaveGoto Cond1FromDivStep1 Cond0FromNotIncOregCarryOut ( A7, A6, A5, A4 ) ; // [3, 2, 1, 0 case]

2BF:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusAregfromZbusBregfromAregSlaveGoto 2BC ;

2C0:XbusfromConstBox All1sfromCboxYbusfromConstBoxEnableChannelandEnableChannelStatusGoto 88 ;

2C1:XbusfromConstBox MemStartplus1fromCBoxYbusfromBregZbusFromXbusWdescRegfromZbusGoto Cond1FromBootFromRomNotLinks ( 92, 90 ) ; // [2, 0 case]

2C2:XbusfromDataInYbusfromBregZbusFromXbusPlusYbusCregfromZbusMemWriteDataInfromPrevReadRegDataRegfromZbusGoto 2CB ;

2C3:XbusfromConstBox TwelvefromCboxYbusfromOregZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 2CC ;

2C4:XbusfromConstBox All1sfromCboxYbusfromOregZbusFromYbusCregfromZbusAregfromBregSlaveBregfromCregSlaveGoto CSNGL ;

2C5:XbusfromConstBox HundredTwenyFourfromCboxYbusfromBregZbusFromMinusXbusDregfromZbusGoto Cond1FromBslave0 ( 9B, 99 ) ; // [2, 0 case]

2C6:XbusfromConstBox ZerofromCboxYbusfromOregZbusFromXbusMinusYbusChannelStackfromZbusGoto 2C0 ;

2C7:XbusfromConstBox All1sfromCboxYbusFromOregSL2ZbusFromYbusAregfromZbusOregFrom0Next ;

2C8:XbusfromIptrRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto Cond1FromProcPriority ( 1AE, 1AC ) ; // [2, 0 case]

2C9:XbusfromConstBox All1sfromCboxYbusfromCregZbusFromYbusMemWriteDataRegfromZbusGoto 2CD ;

2CA:XbusfromWptrRegYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 2C9 ;

2CB:XbusfromConstBox EightfromCboxYbusfromOregZbusFromXbusPlusYbusMemReadAregfromDataInDataMemAddrFromZbusGoto 2BD ;

2CC:XbusfromConstBox All1sfromCboxYbusfromConstBoxBregfromAregSlaveGoto 2C2 ;

2CD:XbusfromWptrRegYbusfromConstBox Minus4fromCboxZbusFromXbusPlusYbusDataMemAddrFromZbusGoto 2C8 ;

2CE:XbusfromChannelDataYbusfromConstBox All1sfromCboxZbusFromXbusChannelStackfromZbusWordIncDregDataRegfromAregDataInfromPrevReadRegDisableChannelStatusGoto Cond0FromNotIncDregCarryOut ( 87, 86 ) ; // [1, 0 case]

2CF:XbusfromConstBox FourfromCboxYbusfromBregZbusFromMinusXbusChannelStackfromZbusResetChannelRunReqlatchGoto 2B9 ;

2D0:XbusfromConstBox MemStartfromCBoxYbusfromBregZbusFromXbusChannelStackfromZbusGoto 2CF ;

2D1:XbusfromConstBox All1sfromCboxYbusfromBregZbusFromXbusChannelStackfromZbusChannelDataRegfromUbusGoto 2D7 ;

2D2:XbusfromConstBox MemStartfromCBoxYbusfromBregZbusFromXbusChannelStackfromZbusGoto 2D1 ;

2D3:XbusfromConstBox All1sfromCboxYbusfromConstBoxResetChannelReadyNotRunlatchResetChannelRunReqlatchGoto Cond1FromChannelReadyNotRun ( 6B, 69 ) ; // [2, 0 case]

2D4:XbusfromDregYbusfromBregZbusFromXbusAndYbusBregfromCregSlaveGoto Cond0FromNotZbusEq0 ( 9F, 9E ) ; // [1, 0 case]

2D5:XbusfromWptrRegYbusfromConstBox All1sfromCboxZbusFromXbusCregfromZbusMemWriteDataMemAddrFromZbusGoto OUT ;

2D6:XbusfromDataInYbusfromConstBox MinIntfromCboxZbusFromXbusMinusYbusDataInfromPrevReadRegGoto Cond0FromNotZbusEq0 ( 83, 82 ) ; // [1, 0 case]

2D7:XbusfromConstBox MemStartfromCBoxYbusfromBregZbusFromXbusMemReadDataMemAddrFromZbusGoto 80 ;

2D8:XbusfromConstBox All1sfromCboxYbusfromConstBoxShiftLeftBregGoto 2E2 ;

2D9:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 82 ;

2DA:XbusfromWdescRegYbusfromConstBox All1sfromCboxZbusFromXbusMemWriteDataRegfromZbusGoto 2CA ;

2DB:XbusfromDataInYbusfromConstBox All1sfromCboxZbusFromXbusBregfromZbusAregfromBregSlaveGoto 2DF ;

2DC:XbusfromDataInYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMinusXbusDataInfromPrevReadRegGoto Cond0FromNotZbusSubLessThan0 ( 65, 64 ) ; // [1, 0 case]

2DD:XbusfromDataInYbusfromConstBox Minus12fromCboxZbusFromXbusPlusYbusMemReadDataMemAddrFromZbusGoto 2DC ;

2DE:XbusfromChannelDataYbusfromConstBox OnefromCboxZbusFromXbusOrYbusWdescRegfromZbusOregFrom0Next ;

2DF:XbusfromConstBox MinIntfromCboxYbusfromBregZbusFromXbusMemWriteDataRegfromZbusGoto MOVE ;

2E0:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 2DB ;

2E1:XbusfromConstBox All1sfromCboxYbusfromEregZbusFromYbusChannelStackfromZbusChannelDataRegfromUbusGoto 2DE ;

2E2:XbusfromConstBox ZerofromCboxYbusfromBregZbusFromXbusMinusYbusBregfromZbusGoto 2D4 ;

2E3:XbusfromAregYbusfromConstBox All1sfromCboxZbusFromXbusDataMemAddrFromZbusGoto 2DA ;

2E4:XbusfromConstBox All1sfromCboxYbusfromConstBoxChannelStackfromZbusGoto 2E1 ;

2E5:XbusfromAregYbusfromConstBox MinIntplus3fromCboxZbusFromYbusMemWriteDataRegfromZbusGoto 2E3 ;