DEC PDP-11/84-E

The PDP-11/84 is one of the last PDP-11 systems to use Unibus for the I/O boards. It actually has a Q-bus 11/83 processor board that is based on the 16-bit 18 MHz J-11 chipset with 8 kB cache memory, and 22-bit addressing. It has higher performance than the really big PDP-11/70 and includes Floating Point and EIS instructions, and a Floating Point Accelerator. It has PMI memory boards, with a Q-bus to Unibus converter to get to the Unibus I/O boards.

This system has the maximum of 4 MB of RAM in two MSV11 PMI (Private Memory Interconnect) memory boards. The PMI provides a private high-speed path between the processor, Unibus Adapter, and RAM. The processor can access it's cache memory while DMA is transferring data between a Unibus Adapter and RAM to give a little bit of concurrency. The system can run the RSX-11M-Plus, RSX-11M, RT-11, RSTS/E, DSM-11, IAS, ULTRIX-11, and UNIX operating systems.

There were two different 6U 10.5" rack mountable chassis available. The early chassis had the power supply on the right side that eliminated the possibility of adding a Unibus expansion backplane, and only had room for 2x 1MB MSV11 RAM board. The later "E" chassis has the power supply at the rear as in a BA11 chassis. The "E" has room for 2x 1MB or 2x 2MB MSV11 RAM boards, and a 9x and a 4x slot DD11 Unibus expansion backplanes. This PDP-11/84 is the later E model chassis. There was also a 40" cabinet chassis, and a little 9x slot chassis where the boards are installed from the left side.

Documentation for this system is limited. I found the ROM diagnostic information in the EK-KDJ1E-UG-001_KDJ11-E_CPU_Module_Users_Guide_Jan91.pdf manual on Bitsavers.

Information on the restoration of this system.

The top view of the PDP-11/84-E. The CPU and RAM are at the right.

Slot Board Model Description

1 M8190-AF KDJ11-BF 11/83-84 CPU J11 CPU 18MHz with 2 boot & diagnostic ROMs, FPJ11-AA

2 M8637-EC MSV11-JB/JC 2-Mbyte ECC RAM

3 M8637-EF MSV11-JB/JC 2-Mbyte ECC RAM

4 M8191 KTJ11-B 11/84 UNIBUS PMI controller with 4 optional boot ROM sockets (M9312 compatible)

5 M7762 RL11 RL01/02 disk controller

CSR = 17774400

6 M7485-YA UDA50 UNIBUS to radial disk interface PR board with no ROMs (SDI disk controller)

7 M7486 UDA50 Controller for SDI disk drives (UDA SI)

8 CMD CDU-720/TM SCSI disk controller

Disk CSR = 17772150 (UDA50)

Tape CSR = 17774500 (KLESI)

9AB M9302 11/04 UNIBUS terminator, far end

9CD G7273 Unibus Grant Module

9EF M7556 MLM Mininum load module +5V 1A -15V 375mA, 11/84

10AB (a M9202 Unibus Connector goes here)

10CDEF M7856 DL11-W RS-232 SLU & realtime clock option

11 M7792 DEUNA DEUNA port module, UNIBUS to ethernet microprocessor. (1 of 2)

12 M7793 DEUNA DEUNA link module, M7792 to ethernet bus line unit. (2 of 2)

13 M7819 DZ11-A 8-line double-buffered async EIA with modem control (50 to 96-Kbaud, 64-byte silo)

14 M7819 DZ11-A 8-line double-buffered async EIA with modem control (50 to 96-Kbaud, 64-byte silo)

15 M7819 DZ11-A 8-line double-buffered async EIA with modem control (50 to 96-Kbaud, 64-byte silo)

16 M7819 DZ11-A 8-line double-buffered async EIA with modem control (50 to 96-Kbaud, 64-byte silo)

17 M7819 DZ11-A 8-line double-buffered async EIA with modem control (50 to 96-Kbaud, 64-byte silo)

18AB M9302 11/04 UNIBUS terminator, far end

18BC G7273 Unibus Grant Module

18EF

Note: The M9302 11/04 UNIBUS terminator in slot 9AB will be removed and an M9202 Unibus Connector will be installed in slots 9AB & 10AB.

The memory and CSR map:

Commands are Help, Boot, List, Setup, Map and Test.

Type a command then press the RETURN key: MAP

18.000 MHz

CPU Options: FPA

Memory Map

Starting Ending Size in CSR CSR Bus

Address address K Bytes address type type

00000000 - 07777776 2048 17772100 ECC PMI

10000000 - 17757776 2040 17772102 ECC PMI

I/O page Map

Starting Ending

Address address

17765000 - 17765776 CPU ROM or EEPROM

17770200 - 17770376 Unibus Map

17772100 - 17772102 Memory CSR's

17772150 - 17772152

17772200 - 17772276 Supervisor I and D PDR/PAR's

17772300 - 17772376 Kernel I and D PDR/PAR's

17772516 MMR3

17773000 - 17773776 CPU ROM or UBA ROM

17774400 - 17774406

17774500 - 17774502

17777520 - 17777524 BCSR, PCR, BCR/BDR

17777546 Clock CSR

17777560 - 17777566 Console SLU

17777572 - 17777576 MMR0,1,2

17777600 - 17777676 User I and D PDR/PAR's

17777730 - 17777734 DCSR, DDR, KMCR

17777744 - 17777752 MSER, CCR, MREG, Hit/Miss

I/O page Map

Starting Ending

Address address

17777766 CPU Error

17777772 PIRQ

17777776 PSW

The boot ROMs

Commands are Help, Boot, List, Setup, Map and Test.

Type a command then press the RETURN key: LIST

Device Unit

name numbers Source Device type

DU 0-255 CPU ROM RDnn, RXnn, RC25, RAnn

DL 0-3 CPU ROM RL01, RL02

DX 0-1 CPU ROM RX01

DY 0-1 CPU ROM RX02

DD 0-1 CPU ROM TU58

DK 0-7 CPU ROM RK05

MU 0-255 CPU ROM TK50, TU81

MM UBA ROM TU16, TE16, TU45, TM02, TM03, TU77

MT UBA ROM TU10, TE10, TS03

MS UBA ROM TS04, TS11, TU80, TK25, TS05

DB 0-3 EEPROM 2322

The DB device is probably the boot ROM in the CMD SCSI controller.

The Setup Configuration:

List/change parameters in the Setup table

A - ANSI Video terminal (1) 0=No, 1=Yes = 1

B - Power up 0=Dialog, (1)=Automatic, 2=ODT, 3=24 = 1

C - Restart 0=Dialog, (1)=Automatic, 2=ODT, 3=24 = 1

D - Ignore battery 0=No, 1=Yes = 1

E - PMG 0-(7) 1=.4us, 2=.8, 3=1.6, 4=3.2,...7=25.6 = 7

F - Disable clock CSR 0=No, 1=Yes = 0

G - Force clock interrupts 0=No, 1=Yes = 0

H - Clock 0=Power supply, 1=50Hz, 2=60Hz, 3=800Hz = 2

I - Enable ECC test (1) 0=No, 1=Yes = 1

J - Disable long memory test 0=No, 1=Yes = 0

K - Disable ROM 0=No, 1=Dis 165, 2=Dis 173, 3=Both = 0

L - Enable trap on Halt 0=No, 1=Yes = 0

M - Allow alternate boot block 0=No, 1=Yes = 0

N - Disable Setup mode 0=No, 1=Yes = 0

O - Disable all testing 0=No, 1=Yes = 0

P - Enable Unibus memory test (1) 0=No, 1=Yes = 0

Q - Disable UBA ROM 0=No, 1=Yes = 0

R - Enable UBA cache (1) 0=No, 1=Yes = 0

S - Enable 18 Bit mode 0=No, 1=Yes = 0

The Boot selections:

List/change the automatic boot selections in the Setup table

A = Disk MSCP automatic boot

B = External ROM boot

E = Exit automatic boot

L = Loop continuously

Boot 1 = DB0

Boot 2 = DU0

Boot 3 = MS0

Boot 4 = MT0

Boot 5 = DR0

Boot 6 = blank

It looks like it is configured to automatically boot from a SCSI disk, then a RAxx disk, then magnetic tape, a DR device?

The Boot Switch selections:

List/change the switch boot selections in the Setup table

Switches 2,3,4 on on off = DB0

Switches 2,3,4 on off on = DU0

Switches 2,3,4 on off off = MS0

Switches 2,3,4 off on on = MT0

Switches 2,3,4 off on off = DR0

Switches 2,3,4 off off on = blank

I am not sure what this does. Time to read the manual.

I got RT-11 to boot from an RL02 disk and this is what it sees:

PDP 11/84 Processor

4088KB of memory

Floating Point Accelerator Unit

Extended Instruction Set (EIS)

Memory Management Unit

ECC Memory

Cache Memory

PMI Memory

60 Cycle System Clock

FPU support

.SHOW DEV

Device Status CSR Vector(s)

------ ------ --- ---------

DL Resident 174400 160

DM Not installed 177440 210

DU Installed 172150 154

DW Not installed 000000

DX Not installed 177170 264

DY Not installed 177170 264

DZ Not installed 000000

RK Not installed 177400 220

LD Installed 000000 000

LS Not installed 176500 470 474 300 304

MM Not installed 172440 224

MS Not installed 172522 224 300

MT Not installed 172520 224

MU Installed 174500 260

NL Installed 000000 000

PI Not installed 000000 000

SL Installed 000000 000

SP Installed 000000 110

VM Installed 177572 250

XC Not installed 173300 210 214

XL Not installed 176500 300 304

LP Not installed 177514 200