Sponsor: FREEDM Systems Center
Mentor(s):
Mark Nations msnation@ncsu.edu
Project Background and Need:
Many of our projects require specialized I/O and signal conditioning, but also have common DSP and FPGA components for control and data acquisition. Unfortunately, this leads to wasted time re-creating common circuits when only small tweaks are required for new projects. Single mistakes and minor changes can lead to a full board re-work of a large, expensive, long-lead time board.
Problem Description/requirements (List of high-level functionality you expect to see in the end product):
We would like to develop an open modular compute/control framework comprised of various pluggable modules to handle compute, data acquisition, I/O, etc. We anticipate a solution like stacked modules or cards/backplane, but are open to anything that fulfills the need. This is potentially a very large project so we propose that the work be 90% in hardware development, with only enough software to verify hardware operation. Proposed modules in order of importance:
i. Compute module mounting TI dual core DSP
ii. I/O interface module for fiber-optic gate drivers
iii. Boilerplate signal conditioning and DAQ module with signal conditioning and optional high speed ADCs
iv. Compute module mounting an FPGA. Likely Intel MAX10.
v. I/O interface module for Wolfspeed gate drivers
It is not critical to complete design all desired modules, but they should be approached in priority order. As an open source project the work shall be completely documented and available online to the public, including potential employers.
Required Skills / Desired Competencies (in order of importance):
Embedded hardware and programming
PCB design and layout
Power electronics and power systems
Analog circuit design
Programming experience
How often and how would you be available to meet/chat with the team (Zoom, Hangout, Skype, Phone)?
Weekly. Remote or in person at NCSU.
Will the students be required to sign any of the following before they start with the project? NDA / CDA / IP assignment / IP protection form
No.
Team Members (Left to Right):
Zachary Murray - Website and Google Folder Manager, Meeting Host - zwmurray@ncsu.edu
Jacob Williams - Purchasing/Sponsor Contact - jrwill22@ncsu.edu
Julia Germano - Meeting Minutes taker & Agenda Manager - jhgerman@ncsu.edu
Project Links:
GitHub Repository (Schematics)
Project Folder (Open access)
Project Meeting Times:
Weekly with Sponsor / Mentors: Fridays 4:00-5:00pm
Weekly Internal Meetings: Thursdays 1:30-2:30pm
Assignments (ECE 484 Fall 2021):
Module Specification Documents
Project Pitch Competition Poster
Status Review 2 / Tech Demo Presentation
Assignments (ECE 485 Spring 2022):
Critical Design Review Presentation