FULL ADDER

Theory:

A full adder is a combinational logic circuit that forms the arithmetic sum of three bits.

it consists of three inputs and two outputs. which performs the addition of three bits A ,B and Cin and it produces sum & carry as Outputs.

Half adder have no scope of adding the carry bit ,to overcome this drawback, full adder comes into play.

BOOLEAN EXPRESSION:

SUM = A ^ B ^ C

CARRY = (A & B) | (B & C) | (A & C)

verilog code;

module full_adder( S, Cout , a, b, cin); 

input a, b, cin;

output S, Cout;

assign S = a ^ b ^ cin;

assign Cout = (a & b) | (b & cin) | (a & cin);

endmodule

Test bench:

module Tb_g; reg a,b,c; wire sout,cout;

FA_gate FA(a,b,c,sout,cout);

initial begin a=1'b0; b=1'b0; c=1'b0; #10;

a=1'b0; b=1'b0; c=1'b1; #10;

a=1'b0; b=1'b1; c=1'b0; #10;

a=1'b0; b=1'b1; c=1'b1; #10;

a=1'b1; b=1'b0; c=1'b0; #10;

a=1'b1; b=1'b0; c=1'b1; #10;

a=1'b1; b=1'b1; c=1'b0; #10;

a=1'b1; b=1'b01; c=1'b1; #10;

$finish;

 end endmodule

RTL schematic: