ECDL: Bridging Materials, Devices, and Circuit in Advanced CMOS Technology Research
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3D Cache from 2D, OS and FE Devices: Enhancement of Cache Density toward Angstrom Technology
2D Transistor
2D Transistor
Exploration of the scaling limitation of devices with monolayer transition metal dichalcogenide (TMD) channels in complementary FET (CFET) architecture.
Figure 1. Nearly Ideal Subthreshold Swing in Monolayer MoS2 Top-Gate nFETs with Scaled EOT of 1 nm (T.-E. Lee et al., IEDM, 2022)
Oxide Semiconductor Transistor
Oxide Semiconductor Transistor
Exploration of BEOL-compatible oxide semiconductor transistors by ALD for monolithic 3D integration.
Ferroelectric Field Effect Transistor (FeFET)
Ferroelectric Field Effect Transistor (FeFET)
Assessment of 1FeFET array with low operation voltage and high endurance for high-density last level cache (LLC).
Figure 2. High-Endurance MoS2 FeFET with Operating Voltage Less Than 1V for eNVM in Scaled CMOS Technologies (T.-E. Lee et al., IEDM, 2023)
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